Some EFR32 SoCs use a secure element subsystem to manage
security features (i.e., TRNG, secure bootloader or cryptographic
functions).
This driver relies on the SE Manager high-level API provided by Silicon
Labs. The API interacts with the SE subsystem, provides helper functions
to achieve cryptographic operations and ensures that only one operation
is running at a time by using mutexes and semaphores.
Instead of relying on the SE Manager from Silicon Labs, one could
recreate the behaviour of the Manager and put the code in the crypto
driver folder and create a dependency for other drivers using the crypto
manager (e.g., keys, entropy).
I went for the SE Manager API as it is already there and supported by
Silicon Labs.
Tested using the random subsystem.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move from using Kconfig NET_PPP_UART_NAME to a devicetree chosen
property ("zephyr,ppp-uart"). This is similar to a number of other
functions like "zephyr,shell-uart" or "zephyr,bt-uart".
As part of this we rework the init code a little to use
DEVICE_DT_GET for the modem gsm-ppp case.
Signed-off-by: Kumar Gala <galak@kernel.org>
Rather than using a devicetree node label, utilize the driver
compat and thus DT_INST which is standard means for most drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
There is a build warning of unused `adc_stm32_oversampling_ratioshift`
function: [-Werror=unused-function]. This makes twister fail, as all
warnings are treated as errors.
Fix that by ifndef'ing adc_stm32_oversampling_ratioshift().
Fixes: c57a41c5d2 ("drivers/adc: stm32: do not disable the ADC if
resolution is unchanged")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
As we work to phase out devicetree 'label' properties, convert
driver to just use sx126x instead of DT_INST_LABEL for logging
purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move the `REQUIRES_FULL_LIBC` dependency from `config LORA` to
`config LORAWAN`. The commit that added the `select` (f590d4fa) mentions
that this is required by `loramac-node`, which is only used by LoRaWAN,
not the base LoRa code.
This results in small FLASH savings when compiling the samples, but can
result in larger savings in more complex applications:
```
// With REQUIRES_FULL_LIBC
west build -b 96b_wistrio zephyr/samples/drivers/lora/send/
[162/162] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37708 B 128 KB 28.77%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
// Without REQUIRES_FULL_LIBC
[181/181] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37444 B 128 KB 28.57%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Change logic in `modem_cmd_handler_setup_cmds` and
`modem_cmd_handler_setup_cmds_nolock` to always sleep
after each sent AT command.
The issue was found using a logic analyzer while debugging 'NO CARRIER'
from a BG95 modem while being in data mode.
The reason 'NO CARRIER' occured was due to crosstalk to DTR which
terminated data mode.
The logic analyzer also revealed that without the delay the next AT
command is sent before the whole 'OK\r\n' is received. This is not
addressed in this commit.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/47082
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
In prepration for configuring I2C/SPI defaults at the board level,
change the DesignWare GPIO driver's clock gate option to depend on clock
control instead of selecting clock control. This breaks a Kconfig
dependency loop when adding the following to a board's
Kconfig.defconfig:
config SPI
default y if SENSOR
There aren't any in-tree users that enable the clock gate option, so
there aren't any places in-tree that now need to enable the clock
control driver. Out-of-tree users that set CONFIG_GPIO_DW_CLOCK_GATE=y
will now also need to set CONFIG_CLOCK_CONTROL=y.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
In preparation for extending samples/sensor/magn_polling to support
additional magnetometer drivers, enable these drivers by default when
the sensor driver class is enabled (CONFIG_SENSOR=y) and a compatible
devicetree node is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The fxos8700 device supports 3 modes: accelerometer-only,
magnetometer-only, or hybrid (accelerometer and magnetometer) modes. The
accelerometer-only mode is register compatible with mma8451q, mma8652fc,
and mma8653fc, which allows the fxos8700 driver to be used with these
devices as well.
Most in-tree boards can use hybrid mode because they have the fxos8700
device, therefore we change the driver default to match the common case.
For the handful of boards that have an mma86xx or mma84xx device, we
override the driver default to accelerometer-only mode. As a result, we
can enable the magn_polling sample application for the fxos8700 driver
without having to add a bunch of board-specific configuration overlays
for hybrid mode.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The I2C API recently updated terminology to replace "master" with
"controller", but this instance in the mcux lpi2c driver was missed.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
If hw-flow-control is set in the uart section of the device tree source,
it is read by gsm_ppp.c and AT+IFC=2,2 is sent to the modem.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/46928.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix issue #45168.
When setting high bit timing, the controller is timing
out when trying to switch from an internal mode to another.
To fix this issue, we add some delay when switching modes.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Fix issue #45169.
With this CAN controller, changing bit timing has to be done in controller
reset mode, resetting some registers to their default values.
TCR register, that is enabling loopback mode is one of these.
Because of this reset, the controller switch back from loopback
to normal mode without the test suite being notified, preventing
receiving sent frames afterwards.
To fix this issue, we are now storing useful registers values before
switching to reset mode and restoring these values in halt mode
before going back in operation mode.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Default mode must be debug or it can't ever be enabled.
Allow debug log messages to be printed when using
mdm_hl7800_send_at_cmd API.
Add logging to active bands and network coverage commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
According to the formulas found in the reference manuals of the SoC
families using the "st,stm32-temp-cal" version of the temperature sensor
(i.e. G0, G4, H7, L0, L1, L4, L5, U5, WB, WL), the temperature is
computed with the following formula:
T = ((TS_CAL2_TEMP - TS_CAL1_TEMP) / (TS_CAL2 - TS_CAL1))
* (TS_DATA - TS_CAL1) + TS_CAL1_TEMP
What is called ts-cal-offset in the stm32_temp driver is therefore the
same value as TS_CAL1_TEMP1. Use it directly instead of defining another
property.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The stm32_temp driver defines the ts-voltage-mv property to determine
the reference voltage of the ADC in the temperature computation. However
this information is already available in the device tree at the ADC
level (even with the same default value). Use it through the ADC API
instead of duplicating the information.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
