Commit Graph

782 Commits

Author SHA1 Message Date
Siew Chin Lim
0c34373720 drivers: clock_control: Add clock driver for Intel SoC FPGA Agilex
Add clock driver for Intel SoC FPGA Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-10-12 08:37:03 -04:00
Krzysztof Chruscinski
c590b3545a drivers: serial: Use microseconds to represent timeout
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
However, there are cases when milliseconds granularity is not
enough and can significantly reduce a throughput, e.g. 1ms is
100 bytes at 1Mb.

Updated 4 drivers which implement asynchronous API. Updated
places where API was used.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-10-12 12:26:56 +02:00
Yuriy Vynnychek
8e5eb1732d drivers: uart: irq_tx_ready info update with TX IRQ dependencies
irq_tx_ready API should return 1 only in case if TX IRQ is enabled.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-10-11 21:02:21 -04:00
Jordan Yates
29773391c7 spi: convert CS usage to gpio_dt_spec
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-05 19:24:18 -04:00
Jordan Yates
89d76e9bbe spi: use gpio_dt_spec in struct spi_cs_control
Use the standard `struct gpio_dt_spec` type in the chip select control.
The anonymous struct and union allows previous instantiations to
continue working while letting functions operate on the new type.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-05 19:24:18 -04:00
Yuval Peress
2629fc566d emul: Add data and parent pointers to emulators
Emulators are difficult to work with, they generally require maintaining
some state in a mutable data struct. Since the emulator struct doesn't
support a data field like devices do, the pattern seems to be to add it
to the configuration. This makes following the logic of where things are
difficult.

1. Add a `struct emul *parent` structure to the espi/i2c/spi emulator
   structs to make it easier when casting up.
2. Add a `void *data` field to `struct emul` to hold the data for
   emulators.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-10-05 19:21:39 -04:00
Bartosz Bilas
d6792dd7be drivers: gsm_ppp: introduce modem on/off callbacks
Allow the user to register function callbacks that
are executed during gsm modem configuring and stopping.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-04 20:46:04 -04:00
Felipe Neves
949a6a8e53 interrupt-controller: intc_esp32c3: make logs optional
Allowing cleaner debug experience and preventing unwanted
outputs during debug.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Felipe Neves
b97c2da2f2 interrupt_controller: intc_esp32c3: added intc driver
For esp32c3 and replaces the hardcoded interrupt
attaching procedures with this new driver.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Pieter De Gendt
00596182fc drivers: hwinfo: add reset causes
Add reset causes for temperature (e.g. overheating), hardware faults
and a user initiated reset.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-09-29 14:44:21 -04:00
Yuval Peress
03bcf8276a emul: Support getting an emulator by name
Issue #38271

Implement a getter for emulators similar to device_get_binding. This
function can be used to get the emulator instance during tests to call
emulator specific functions.

Example: The current BMI160 emulator pre-defines a finite set of data
samples that will be returned. If a test was to be written for logic
that uses that data, then the emulator would become completely useless
without the ability for the test to define what data should be returned.

This will also help in exercising error conditions in tests.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-09-28 20:12:37 -04:00
Neil Armstrong
e819bd8f34 interrupt_controller: gicv3: add support for LPIs
The LPI (Locality-specific Peripheral Interrupts) are edge-triggered
message-based interrupts that can use an Interrupt Translation
Service (ITS) to route an interrupt to a specific Redistributor and
connected PE.

This implement the necessary LPI support when an ITS is enabled.

The LPI states are stored in memory-backed tables.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-28 19:45:29 -04:00
Neil Armstrong
340a8697d2 interrupt_controller: Add GICv3 ITS API
Add driver API for the Interrupt Translation Service GICv3 module.

The Interrupt Translation Service (ITS) translates an input EventID
from a device, identified by its DeviceID, and determines the
corresponding INTID for this input and target Redistributor + target
PE for that INTID to be delivered as LPI interrupt.

The API permits :
- allocating a new unique LPI interrupt number
- initializing support for a new DeviceID and the required EventIDs
- mapping a DeviceID + EventID to a LPI interrupt number
- triggering an LPI with a DeviceID + EventID

This API will be used by the PCIe MSI/MSI-X logic in another patchset.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-28 19:45:29 -04:00
Krzysztof Chruscinski
581c20e242 drivers: uart: Cleanup not supported API handling
Fixed discrepancy between documentation and actual returned
error code when API is not enabled or not supported by a
device. Added detection of case when device does not implement
uart_callback_set but ASYNC api is enabled. Returning -ENOSYS in
that case.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-09-27 10:08:28 -04:00
Yuval Peress
a1f6d97978 drivers: syscon: Add support for multiple regions
1. Add support for multiple syscon entries (as a side effect, this also
   fixed syscon.c implementations which weren't being linked to their
   syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-09-22 10:32:11 -04:00
Håkon Øye Amundsen
c0a9de08a2 drivers: clock_control: nrf: fix cpp compatibility
Add missing extern block for CPP compatibility

Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
2021-09-14 09:56:46 +02:00
Jiafei Pan
6f1dc5d3a9 drivers: gicv3: set SPI's affinity when it is enabled
When affinity routing is enabled for Non-secure state
( GICD_CTLR.ARE_NS is '1'), need to set routing information
for the SPI interrupt.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-09-07 11:31:22 -04:00
HaiLong Yang
e15bdaa1bd drivers: adc: add PGA gain value
Add PGA gain value for TI ads1299-x chip.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-09-03 10:10:09 -04:00
Andrei Emeltchenko
12f67c11cd pcie: shell: Print more MSI-X information
For pcie ls command print more detailed MSI / MSI-X information.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-09-03 10:09:05 -04:00
Mateusz Sierszulski
2c718b2726 drivers: fpga controller: add fpga api
This adds new FPGA controller which allow to control FPGA chips.

FPGA controller has been created to enable bitstream loading
into the reprogrammable logic. It adds completely new API,
which enables to check status of the FPGA chip, power it on
or off and reset it.

Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
2021-09-03 09:54:00 -04:00
Neil Armstrong
95315239d8 pcie: use newly introduced IDs define for MSI/MSI-X
Remove the locally MSI/MSI-X capabilities ID define and use the
newly introduced one from the PCI Code and ID Assignment
Specification Revision 1.11 document header.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-02 19:37:56 -04:00
Neil Armstrong
bcbae563ea pcie: add PCI & PCIe capabilities IDs defines
Add defines for all the PCI and PCIe capabilities from the PCI Code
and ID Assignment Specification Revision 1.11 document.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-02 19:37:56 -04:00
Neil Armstrong
99c2279abf pci: add Extended PCI(e) capability offset get
Extend the PCIe API to find Extended Capabilities in the PCI Express
Extended Capabilities located in Configuration Space at offsets 256
or greater.

Note: the Root Complex Register Block is not supported

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-02 19:37:56 -04:00
Ryan Erickson
ef322d9e16 drivers: modem: hl7800 Add Site Survey
Add API to determine nearby cell towers and their signal
strength.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-09-01 12:33:29 -04:00
Ryan Erickson
aba8a21001 drivers: modem: hl7800: Add Position over LTE (PoLTE)
Position over LTE (PoLTE) can be used to locate a device as
an alternative to GNSS.
Increase RX thread stack size for PoLTE processing.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-09-01 09:33:46 -04:00
Ryan Erickson
f094346e18 drivers: modem: hl7800: Add GNSS support
Add API to use GNSS on the HL7800 modem.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-09-01 09:33:46 -04:00
Ryan Erickson
e29dbf5d04 drivers: modem: hl7800: Add airplane mode
Add API to set HL7800 to airplane mode.
Also add option to boot into airplane mode.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-09-01 09:33:46 -04:00
Ryan Erickson
11e992099b drivers: modem: hl7800: Add delayed start
Allow application control for starting modem driver.
This allows network attach to be randomized.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-09-01 09:33:46 -04:00
Sigvart Hovland
ad4daa722a drivers: flash: add specific api for access flash_simulator RAM
For getting the address of the RAM region in the application we need to
extend the api for the flash_simulator.

This path introduce flash_simulator_get_memory() call which allow to
do so.

Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2021-09-01 12:09:58 +02:00
Ryan Erickson
ac751b7bcc drivers: modem: hl7800: Query IMSI
Add API to query SIM card IMSI.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-08-31 19:25:13 -04:00
Yong Cong Sin
9d2f8a1124 drivers: modem: gsm_ppp: Use DTS
Convert the gsm_ppp driver to use DTS.

Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2021-08-31 17:33:34 -04:00
Ryan Erickson
61ef41fc24 drivers: modem: hl7800: Add query carrier config
Add API to query the carrier config of the HL7800.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-08-31 17:30:46 -04:00
Daniel Leung
ec2b9d42af pcie: msi: pci_msi_enable() to take IRQ as parameter
This changes pci_msi_enable() to take IRQ number as a function
parameter. The old behavior relies on putting the IRQ number
into the interrupt line register in the PCI config space
during IRQ allocation, and reading it back when enabling IRQ.
However, the interrupt line register is only required to be
read-/writable when legacy interrupt is supported on the device.
Otherwise it has undefined behavior. On ACRN, they don't even
care about this register and always wires it to 0x00.
So this commit changes the behavior in pci_msi_enable() to not
require reading back the interrupt line register and instead
takes the IRQ number via function parameter.

Fixes #36765

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-08-30 13:04:36 +03:00
Francois Ramu
9cddbd5990 include: drivers: dma.h DMA_MAGIC is a 32-bit magic code
The magic code to identify context content is a 32-bit value
defined in the dma.h. When tested against the dma_context magic element,
both format must be aligned.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-08-27 13:08:33 -04:00
Arvin Farahmand
419b103dd6 drivers: Add mdio API
This commit adds support for MDIO bus. The bus is used by Ethernet
MACs to communicate with PHYs.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-08-27 11:43:48 -04:00
Yuval Peress
ab6e724ab4 emul: espi: Add ACPI Shared Memory functions
Add the bare minimum to set and access the ACPI shared memory via the
eSPI emulator.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-26 13:14:05 -04:00
Emil Gydesen
96dfad0eef Bluetooth: host: Add ISO support for num_completed_packets event
Change so that num_completed_packets event handling is also
enabled for broadcast ISO only builds. This is because sending
data on a broadcast ISO still generates this event.

Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
2021-08-25 18:06:09 -04:00
Erwan Gouriou
7406ad8553 dts/bindings: Add binding for STM32WL HSE Clock
STM32WL features a specific HSE clock with dedicated properties.
Add a dedicated binding and update STM32 clock control driver
header to take it into account.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-08-24 07:19:12 -04:00
Tomasz Bursztyka
f70ecc1099 drivers/pcie: Improve and fix MBAR retrieval depending on use cases
So far pcie_get_mbar() has been the only way to retrieve a MBAR. But
it's logic does not fit all uses cases as we will see further.
The meaning of its parameter "index" is not about BAR index but about
a valid Base Address count instead. It's an arbitrary way to index
MBARs unrelated to the actual BAR index.

While this has proven to be just the function we needed so far, this has
not been the case for MSI-X, which one (through BIR info) needs to
access the BAR by their actual index. Same as ivshmem in fact, though
that one did not generate any bug since it never has IO BARs nor 64bits
BARs (so far?).

So:

- renaming existing pcie_get_mbar() to pcie_probe_mbar(), which is a
  more relevant name as it indeed probes the BARs to find the nth valid
  one.
- Introducing a new pcie_get_mbar() which this time really asks for the
  BAR index.
- Applying the change where relevant. So all use pcie_probe_mbar() now
  but MSI-X and ivshmem.

Fixes #37444

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-08-20 06:30:20 -04:00
Francois Ramu
c4161024c4 drivers: dma: stm32 dma of type V1 with mux
This is the configuration of the stm32h723 where the
dma1 & dma2 of type V1 with a MUX. Even if DMA is of type V1,
the 'feature' does not exist with DMAMUX

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-08-20 06:28:32 -04:00
Martí Bolívar
fbd5e1f316 drivers: clock_control_litex: remove MMCM_NAME
This now unused and unnecessary.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-08-19 17:20:21 -04:00
Henrik Brix Andersen
d2ddd379c9 drivers: pwm: clarify API details
Clarify the PWM pwm_pin_set_cycles() function API details.

The API aims for synchronous (glitch-free) updates of the PWM period and
pulse width, but not all PWM controllers support this.

Similarly, the API aims for independance between channels on
multi-channel PWM controllers, but not all PWM controllers support this.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-08-19 17:14:48 -04:00
Francois Ramu
be2f0bfaa9 include: drivers: dma format the documentation from header file
This patch is re-formating the doc generated from the dma.h
header file. Result to be accessible on the
https://docs.zephyrproject.org/latest/reference/peripherals/dma.html

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-08-19 10:22:20 -04:00
Jordan Yates
93b4dbcc19 lora: lora_send blocks until completion
Change the behaviour of `lora_send` to block until the transmission
completes. The current asynchronous behaviour is exposed through the
new function `lora_send_async`. This naming convention brings LoRa in
line with other asynchronous subsystems.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-08-18 05:16:46 -04:00
Andrei Emeltchenko
252ad12fe5 edac: ibecc: Fix return error type
Fix return error type.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2021-08-17 17:21:50 +02:00
Robert Szczepanski
fceb5a1c44 drivers: video: add more camera control IDs
Add more camera control IDs for cameras with more capabilities.

Signed-off-by: Robert Szczepanski <rszczepanski@antmicro.com>
2021-08-17 09:18:38 -04:00
Robert Szczepanski
69cc20bb17 drivers: video: add JPEG pixel format
Add JPEG pixel format needed for cameras with JPEG
compression capability.

Signed-off-by: Robert Szczepanski <rszczepanski@antmicro.com>
2021-08-17 09:18:38 -04:00
Christopher Friedt
5c7f395f8f Revert "include: driver: sensor: add tank level channel in units of percent"
This reverts commit f51aec4307.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-08-10 09:44:48 -05:00
Henrik Brix Andersen
13696f709e drivers: sensor: add hysteresis attribute
Add sensor API hysteresis attribute. This attribute allows for
configuring trigger threshold hysteresis values.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-08-09 19:50:29 -04:00
Nick Ward
f51aec4307 include: driver: sensor: add tank level channel in units of percent
Provides an enum for tank level sensor drivers.

Signed-off-by: Nick Ward <nick.ward@setec.com.au>
2021-08-09 16:24:50 -04:00