Commit Graph

51 Commits

Author SHA1 Message Date
Christopher Friedt
80f73a053f doc kernel: atomics: support for 64-bit atomic operations
By redefining `atomic_t` as `long`, the type is 32-bit on
32-bit architectures and 64-bit on 64-bit architectures.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2021-11-15 09:59:01 -05:00
Lauren Murphy
a6dcf333a1 doc: misc fixes
Makes miscellaneous fixes to kernel and usermode documentation,
such as fixing broken links and adding clarifying wording.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-10-04 16:42:08 -04:00
Yasushi SHOJI
49d003a925 doc: Markup kconfig options with :kconfig: role
Some Kconfig options are left marked as inline literals.  But in
Zephyr document, we use the "kconfig" role provided by Sphinx.

Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
2021-07-20 13:32:36 -04:00
Lauren Murphy
ab2ede428a doc, cpp: Update CXX support to show exception support
Updates CXX support documentation to reflect exception support
added in fixes for #32448 and #35772.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-07-12 23:35:45 +03:00
Gerard Marull-Paretas
9dfbdf1997 doc: use kconfig role and directive
Stop using :option: for Kconfig options.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-06-29 10:26:28 -04:00
Kumar Gala
6d51863e0d toolchain: remove deprecated BUILD_ASSERT_MSG macro
The macros have been deprecated for 2 releases so remove the code
associated with them.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-06-11 16:35:19 -05:00
Anas Nashif
8b34495bd0 doc: move TLS to the kernel section
Move TLS docs into the 'Others' section of the kernel chapter.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-06-11 08:50:39 -04:00
Gerard Marull-Paretas
8c4b757fd4 doc: remove redundant breathe project
The default breathe project is `Zephyr`, so there is no need to specify
it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-20 20:04:51 +02:00
Peter Bigot
c42eb823ce doc: kernel: interrupts: correct description of irq lock behavior
Contrary to the documentation giving a semaphore while an IRQ lock is
held does not release the lock and give control to another thread.
The release-lock behavior is observed only if the lock-holding thread
sleeps.

However the opportunity to reschedule will have been lost so it may be
necessary to explicitly yield to allow the higher-priority thread to
be serviced.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-05-07 09:28:13 -04:00
Nicolas Pitre
f1f63dda17 arm64: FPU context switching support
This adds FPU sharing support with a lazy context switching algorithm.

Every thread is allowed to use FPU/SIMD registers. In fact, the compiler
may insert FPU reg accesses in anycontext to optimize even non-FP code
unless the -mgeneral-regs-only compiler flag is used, but Zephyr
currently doesn't support such a build.

It is therefore possible to do FP access in IRS as well with this patch
although IRQs are then disabled to prevent nested IRQs in such cases.

Because the thread object grows in size, some tests have to be adjusted.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-05-03 11:56:50 +02:00
Ningx Zhao
9136c40833 tests: poll: revised document error
Some description about poll are not right,
adding some new description to revise it.

Fixes #33712

Signed-off-by: Ningx Zhao <ningx.zhao@intel.com>
2021-05-03 11:56:22 +02:00
Anas Nashif
e9662c8cf4 docs: structures: move ring buffer
We had duplicate entries for ring buffer, merge them into one document.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-15 14:04:05 -04:00
Anas Nashif
a7f570692f doc: group data structure docs and add doxygen linkage
Move out of misc/ and put in own folder and add the grouping to doxygen
to be able to reference the doxygen docs into RST.
Move each item into their own file to reduce clutter and to make it
less crowded in one single page.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-15 14:04:05 -04:00
Andy Ross
820c94e5dd arch/xtensa: Inline atomics
The xtensa atomics layer was written with hand-coded assembly that had
to be called as functions.  That's needlessly slow, given that the low
level primitives are a two-instruction sequence.  Ideally the compiler
should see this as an inline to permit it to better optimize around
the needed barriers.

There was also a bug with the atomic_cas function, which had a loop
internally instead of returning the old value synchronously on a
failed swap.  That's benign right now because our existing spin lock
does nothing but retry it in a tight loop anyway, but it's incorrect
per spec and would have caused a contention hang with more elaborate
algorithms (for example a spinlock with backoff semantics).

Remove the old implementation and replace with a much smaller inline C
one based on just two assembly primitives.

This patch also contains a little bit of refactoring to address the
scheme has been split out into a separate header for each, and the
ATOMIC_OPERATIONS_CUSTOM kconfig has been renamed to
ATOMIC_OPERATIONS_ARCH to better capture what it means.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-03-08 11:14:27 -05:00
Daniel Leung
ce44048d46 x86: rename CONFIG_SSE* to CONFIG_X86_SSE*
This adds X86 keyword to the kconfigs to indicate these are
for x86. The old options are still there marked as
deprecated.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-02-15 08:21:15 -05:00
Ioannis Glaropoulos
099e9216d4 arm: cortex_m: update docs to reflect the lazy stacking functionality
Update the documentation for Lazy Stacking in Cortex-M, to
reflect the functionality changes (activate the lazy stacking
dynamically when building with MPU stack guards).

Make a note that the FP sharing mode is now default in Cortex-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-02 17:58:58 -05:00
Krzysztof Chruscinski
712ff3298b doc: kernel: other: ring_buffers: Add Kconfig option description
Added section with configuration options.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-01-07 16:54:59 -05:00
Martin Åberg
53a4acb2dc SPARC: add FPU support
This change adds full shared floating point support for the SPARC
architecture.

All SPARC floating point registers are scratch registers with respect
to function call boundaries. That means we only have to save floating
point registers when switching threads in ISR. The registers are
stored to the corresponding thread stack.

FPU is disabled when calling ISR. Any attempt to use FPU in ISR
will generate the fp_disabled trap which causes Zephyr fatal error.

- This commit adds no new thread state.
- All FPU contest save/restore is synchronous and lazy FPU context
  switch is not implemented.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-12-04 14:33:43 +02:00
Anas Nashif
80e471dbd9 doc: kernel: clarify object limits
Clarify that while any number of kernel objects can be created, there is
a limit which is set by the available RAM.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-19 13:18:59 -05:00
Krzysztof Chruscinski
1e46bb3bb5 lib: os: ring_buffer: Allow using full buffer capacity
Previously, ring buffer had capacity of provided buffer size - 1. This
trick was used to distinguish between empty and full states. It had one
drawback: ring buffer could not be used as a pool of equal sized buffers
(using ring_buf_put_claim and ring_buf_get_claim).
Reworked internals to use non wrapping head and tail. Since they are
non wrapping, there is no issue with distinguishing between empty and
full. Since this appraoch would be vulnerable to wrapping on 32 bit
boundary, added a mechanism which periodically reduces all indexes to
avoid 32 bit wrapping.

After this rework, buffer has one byte more capacity. Simple test shows
slight performance improvement.

Updated tests to reflect increased capacity and added test to check if
it is possible to continuesly allocated 2 buffers of half ring buffer
size.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-11-11 13:17:49 +01:00
Martin Jäger
ba9fd65a4b doc: kernel: interrupts: zero-latency IRQ update
Add description how to enable zero-latency interrupt in the application
code. Previous docs described only the Kconfig and not the flag.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-26 13:15:20 +01:00
Fabio Utzig
4c2f0605da doc: fix invalid usage of function to :c:macro:
Some macros were using :c:func: and :cpp:func: which forbids Breathe
from resolving those symbols. Update to :c:macro: for proper resolution.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-08-31 09:57:33 -04:00
Fabio Utzig
c79d2ce794 doc: update struct references to use :c:struct:
Sphinx>=3.0 includes the `struct` role in the C domain, which provides a
specific way to link to structs, while the old :c:type: role should be
primary used to typedefs. Update existing references, using :c:type:,
:cpp:type: or emphasized symbols that point to structs to use the new
role.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-08-31 09:57:33 -04:00
Fabio Utzig
53fd5ff236 doc: update function references to use :c:func:
Following the change to use the C domain for parsing, update all
existing :cpp:func: references to :c:func:. Remove the parentheses as
well, if used, because they are not needed, this is already known to be
a function, and how it is displayed in the documentation later is a
semantic decision done by the output builder.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-08-31 09:57:33 -04:00
Anas Nashif
0ff33d1ae7 doc: fix usage of :c:type
Fixing issues with recent versions of breathe 4.19.2:

 WARNING: Unparseable C cross-reference: 'struct device'
 Invalid C declaration: Expected identifier in nested name, got keyword:
 struct [error at 6]
   struct device
     ------^

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-07-16 15:44:50 -04:00
Anas Nashif
568211738d doc: replace lifo/fifo with LIFO/FIFO
Replace all occurances of lifo/fifo with LIFO/FIFO to be consistent.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-07-15 14:01:33 -04:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Stephanos Ioannidis
aaf93205bb kconfig: Rename CONFIG_FP_SHARING to CONFIG_FPU_SHARING
This commit renames the Kconfig `FP_SHARING` symbol to `FPU_SHARING`,
since this symbol specifically refers to the hardware FPU sharing
support by means of FPU context preservation, and the "FP" prefix is
not fully descriptive of that; leaving room for ambiguity.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-05-08 10:58:33 +02:00
Stephanos Ioannidis
0e6ede8929 kconfig: Rename CONFIG_FLOAT to CONFIG_FPU
This commit renames the Kconfig `FLOAT` symbol to `FPU`, since this
symbol only indicates that the hardware Floating Point Unit (FPU) is
used and does not imply and/or indicate the general availability of
toolchain-level floating point support (i.e. this symbol is not
selected when building for an FPU-less platform that supports floating
point operations through the toolchain-provided software floating point
library).

Moreover, given that the symbol that indicates the availability of FPU
is named `CPU_HAS_FPU`, it only makes sense to use "FPU" in the name of
the symbol that enables the FPU.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-04-27 19:03:44 +02:00
Corey Wharton
58232d58e0 riscv: Add support for floating point
This change adds full shared floating point support for the RISCV
architecture with minimal impact on threads with floating point
support not enabled.

Signed-off-by: Corey Wharton <coreyw7@fb.com>
2020-04-22 16:39:48 -07:00
Peter Bigot
fadd98aad2 sys: add generic asynchronous notification infrastructure
k_poll() for a signal is often desired for notification of completion
of asynchronous operations, but there are APIs where it may be
necessary to invoke "asynchronous" operations from contexts where
sleep is disallowed, or before the kernel has been initialized.
Extract the general notification solution from the on-off service into
a utility that can be used for other APIs.

Also move documentation out to a resource management section.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-04-06 16:41:41 +02:00
Oleg Zhurakivskyy
c408fa88a3 toolchain: common: Merge build assert macros
In order to de-duplicate 2 macros with the same use,
merge BUILD_ASSERT(), BUILD_ASSERT_MSG() into one macro.

Make BUILD_ASSERT_MSG() deprecated.

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2020-03-31 07:18:06 +02:00
Ioannis Glaropoulos
b61ba8df4a doc: reference: kernel: remove inconsistent comment for k_cpu_idle
k_cpu_idle() API does not need to be invoked with interrupts
unlocked; it is actually invoked with interrupts locked by
the kernel CPU idling mechanism. In most architectures, the
function is, actually, un-locking interrupts itself. We need
to remove this comment from the documentation of the CPU
idle API. We add a note about the un-locking of interrupts.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-03-20 11:53:14 +01:00
Carles Cufi
cd38fb1610 Revert "toolchain: common: Merge build assert macros"
This reverts commit 974aa3add4.

Pull Request #23437 was merged by mistake with an invalid manifest.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-03-19 18:45:13 +01:00
Oleg Zhurakivskyy
974aa3add4 toolchain: common: Merge build assert macros
In order to de-duplicate 2 macros with the same use,
merge BUILD_ASSERT(), BUILD_ASSERT_MSG() into one macro.

Make BUILD_ASSERT_MSG() deprecated.

Signed-off-by: Oleg Zhurakivskyy <oleg.zhurakivskyy@intel.com>
2020-03-19 15:47:53 +01:00
Ulf Magnusson
47963cae3f doc: dts: Add lots of documentation for generated macros
Add detailed documentation for macros that get generated by
gen_defines.py. Covers properties, interrupts, phandle-arrays, clocks,
buses, flash partitions, SPI, etc.

Should be relatively complete now, though there might be overlooked
details.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Co-Authored-By: Kumar Gala <kumar.gala@linaro.org>
Co-Authored-By: Marti Bolivar <marti.bolivar@nordicsemi.no>
2020-02-18 15:24:59 -06:00
Peter A. Bigot
1964bf08bb lib: os: onoff: add API for on-off service request and release management
There are various situations where it's necessary to support turning
devices on or off at runtime, includin power rails, clocks, other
peripherals, and binary device power management.  The complexity of
properly managing multiple consumers of a device in a multithreaded
system suggests that a shared implementation is desirable.  This
commit provides an API that supports managing on-off resources.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-01-29 14:08:46 +01:00
Ioannis Glaropoulos
c393f3f87a doc: interrupts: add documentation section for zero-latency IRQs
Add a simple documentation section for the Zero-Latency
IRQs feature supported by the kernel.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-08 19:57:56 -05:00
Ioannis Glaropoulos
0eb93c201b doc: list dynamic direct interrupts as ARM supported API
Document that the Dynamic Direct interrupts feature is
implemented and supported as an ARM-only API.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-08 10:15:09 -08:00
David B. Kinder
17299f0734 doc: document python build scripts
We have a collection of python scripts that are part of our build
system.  This PR collects docstring comments added to these scripts into
a summary document.  Previous references to just the script name in
other documentation are updated to point to this build tool
documentation.

Some of the scripts needed an update to be processed (via include
directives) consistently.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-02 17:09:29 -05:00
Ulf Magnusson
984bfae831 global: Remove leading/trailing blank lines in files
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 19:17:27 +01:00
Christoph Reiter
a92a35c2f3 doc: fix list formatting in ring_buffer
There is one level of spaces too much which leads to incorrect
formatting.

Signed-off-by: Christoph Reiter <christoph.reiter@infineon.com>
2019-10-15 09:54:39 -07:00
Andrew Boie
4ce988ab43 doc: provide error handling documentation
We don't really have docs on how fatal errors are induced
or handled. Provide some documentation that covers:

- Assertions (runtime and build)
- Kernel panic and oops conditions
- Stack overflows
- Other exceptions
- Exception handling policy

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-23 23:45:08 +02:00
Wayne Ren
a39f5a8cab doc: add doc of arc floating point support
add doc of arc floating point support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-01 18:09:35 -07:00
Ioannis Glaropoulos
0bae5a48d4 doc: reference: float: document ARM thread tag recommendation
This commit adds a short note in reference/kernel/other/float.
The note instructs to apply pre-tagging of ARM threads to
indicate that they indend to use the FP services.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-27 18:07:03 -07:00
Charles E. Youse
3dc7c7a6ea drivers/interrupt_controller/mvic.c: remove MVIC interrupt controller
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Ioannis Glaropoulos
d281e12569 doc: kernel: rework doc section of shared FP registers mode
This commit rewrites the documentation section describing
the Shared FP registers mode for Cortex-M to align with the
latest architecture rework of Shared FP mode.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-12 09:17:45 -07:00
Ioannis Glaropoulos
1a2ef42973 arch: arm: remove FP activation in system boot
This commit removes the activation of the FP context
in ARM system boot. There is no need to do this, since
the FP context will be activated in the presence of
floating point instructions. We update the reference
documentation accordingly.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-05-03 14:25:22 -04:00
Ioannis Glaropoulos
3bc0f88653 doc: kernel: float: fix ARM-specific content
This commit updates the documentation as follows:
- stresses that the lazy stacking preservation is disabled
  by default and not supported in ARM Cortex-M builds,
- corrects the figure of extra stack requirement when
  floating point services are enabled in ARM builds.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-25 22:32:00 -04:00
Ioannis Glaropoulos
fd3c26a9f9 doc: kernel: float: several content fixes
This commit provides the following fixes:
- Corrects the note regarding which ARM MCUs may support
  floating point services
- Rewords the text stressing the undefined behavior when
  multiple threads access the floating point registers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-03-25 22:32:00 -04:00