Rename function _PlatformInit() to z_platform_init() to
comply with naming conventions.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add option for enabling the Code Cache present on the NXP Kinetis
KE1xF SoC series and enable it by default.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a new clock control driver for NXP Kinetis SoCs that have the
Peripheral Clock Controller module (PCC).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add mcux 2.5.0 drivers and device header files for mimxrt1015. Update
several drivers that were already imported for other SoCs but also apply
to mimxrt1015.
Origins: NXP MCUxpresso SDK 2.5.0
URL: mcuxpresso.nxp.com
Maintained-by: External
Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
Rename reserved function names in drivers/ subdirectory. Update
function macros concatenatenating function names with '##'. As
there is a conflict between the existing gpio_sch_manage_callback()
and _gpio_sch_manage_callback() names, leave the latter unmodified.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
Discovered with pylint3.
Use the placeholder name '_' for unproblematic unused variables. It's
what I'm used to, and pylint knows not to flag it.
Python tip:
for i in range(n):
some_list.append(0)
can be replaced with
some_list += n*[0]
Similarly, 3*'\t' gives '\t\t\t'.
(Relevant here because pylint flagged the loop index as unused.)
To do integer division in Python 3, use // instead of /.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
In case of double buffering (two capture buffers), the CSI is
frequently starved because of a lack of buffer in the active pool.
You can find below an example of double buffering scenario:
FREE_BUF ACTIVE_BUF
start: 0 2
frame0_complete: 0 1 (no buffer to load in active)
resubmit_frame0: 1 1
frame1_complete: 1 0 (CSI stopped, active buf = 0)
resubmit_frame1: 2 0
0 -> 2 (CSI restarted)
This patch solves this issue by loading buffer to active at submit
time.
FREE_BUF ACTIVE_BUF
start: 0 2
frame0_complete: 0 1
resubmit_frame0: 1 1
0 -> 2 (Direct load to active)
frame1_complete: 0 1
resubmit_frame1: 1 1
0 -> 2
...
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
We previously added a cmake hack to alias rt1052 A0 part numbers (A
suffix) to A1 part numbers (B suffix), but this hack did not work
correctly when a board uses A1 part numbers directly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a new config HAS_MCUX_FTFX to conditionalize the mcux flash driver
on socs that support it. Selects HAS_MCUX_FTFX on all kinetis socs
except kw40z, because even though this soc has the relevant hardware,
its CMSIS header file is not compatible with the mcux flash driver in
ext/.
This change also prevents enabling the mcux flash driver on lpc and imx
rt boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The file was in two subfolders as copied from the FreeRTOS BSP
for i.MX6 and i.MX7. Unified the file and moved it into the
devices folder, like in the FreeRTOS BSPs.
Fixes: #13748
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Adds a shim layer around the mcux rtc driver to adapt it to the zephyr
counter interface. Portions of this driver are reused from the existing
rtc driver in drivers/rtc/rtc_mcux.c.
The hardware supports a single alarm only and a fixed wrap value.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer)
peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Adds a shim layer around the mcux elcdif driver to adapt it to the
zephyr display interface. Although the hardware and underlying mcux sdk
driver can support additional configurations, some shortcuts are
currently made in the shim that force a given pixel format, lcd data
bus width, and signal polarity. This works with the rocktech lcd module
used on imx rt boards, but will need to be updated for other display
panels.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We forgot to include the mimxrt1060_evk_hyperflash board variant when
building mcux support for external memories.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Force Operation Mode Strap Override register to disable NANDTree. This
is due to some users reporting PHY entering NANDTree.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Boot PHY initialization timeout, caching mechanism fixes and networking
buffer descriptors moved to no cache section. Enabled cache management
in networking driver and manual barriers.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds a shim layer around the mcux lpi2c driver to adapt it to the zephyr
i2c interface. This shim driver leverages heavily from the mcux i2c shim
driver because the MCUXpresso SDK provides similar APIs for the i2c and
lpi2c peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Adds support for the device configuration data (DCD), which provides a
sequence of commands to the imx rt boot ROM to initialize components
such as an SDRAM.
It is now possible to use the external SDRAM instead of the internal
DTCM on the mimxrt1020_evk, mimxrt1050_evk, and mimxrt1060_evk. Note,
however, that the default board configurations still link data into
internal DTCM, therefore you must use a device tree overlay to override
"zephyr,sram = &sdram0"
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds support for the boot data, image vector table, and FlexSPI NOR
config structures used by the imx rt boot ROM to boot an application
from an external xip flash device.
It is now possible to build and flash a bootable zephyr image to the
external xip flash on the mimxrt1020_evk, mimxrt1050_evk, and
mimxrt1060_evk boards via the 'ninja flash' build target and jlink
runner. Note, however, that the default board configurations still link
code into internal ITCM, therefore you must set CONFIG_CODE_HYPERFLASH=y
or CONFIG_CODE_QSPI=y explicitly to override the default. You must also
set CONFIG_NXP_IMX_RT_BOOT_HEADER=y to build the boot header into the
image.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Updates the MCUXpresso SDK to version 2.5.0 for applicable SoCs.
Wireless (KW*) and legacy (KL25) SoCs were not included in this
MCUXpresso SDK release and are therefore not updated here.
New in this release is SoC-level and board-level support for external
xip flash in the i.MX RT family.
For RT1050, we are now using the MCUXpresso SDK for the EVKB version of
the board, which correponds to an upgrade from A0 to A1 silicon.
However, we don't yet have Kconfigs in place to support A1 silicon part
numbers, and therefore add a simple cmake hack to convert A0 part
numbers to A1 part numbers.
The SDK flash driver interface also changed slightly in this release,
and thus the zephyr flash shim driver is updated accordingly.
Origin: MCUXpresso SDK
License: BSD 3-Clause
URL: mcux.nxp.com
Purpose: Provide device header files and bare metal peripheral drivers
for Kinetis, LPC, and i.MX SoCs.
Maintained-by: External
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Devices with external xip flash like the rt1050 and rt1060 have
additional support files in the MCUXpresso SDK. Enhance the mcux import
script to pick up these files.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Updates the mcux import script to place fsl_iomuxc.* files into the
device-specific folder rather than the shared driver folder.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This file was moved into a device-specific folder in commit
282d95f655 but inadvertantly added back to
the imx driver folder in commit
a4633da9f5.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables Networking hardware on i.MX-RT 1050-EVKB board.
Pinout enabled board specific etherenet connection, also pin
initialization was moved later to PRE_KERNEL_2 in order to have
sysclock initialized before.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Add driver for i.MX Messaging Unit peripheral which can be used for
i.MX6SoloX, i.MX7D and other i.MX socs.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add mcux 2.4.0 drivers and device header files for mimxrt1061 and
mimxrt1060. Updates several drivers that were already imported for
other SoCs but also apply to mimxrt1061 and mimxrt1062.
Origins: NXP MCUxpresso SDK 2.4.0
URL: mcuxpresso.nxp.com
Maintained-by: External
Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
Introduces a new mcux lpspi shim driver to be used on the imxrt soc.
This shim driver leverages heavily from the mcux dspi shim driver
because the MCUXpresso SDK provides similar APIs for the lpspi and dspi
peripherals.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
If the mcux driver has PTP support, then enable
ENET_ENHANCEDBUFFERDESCRIPTOR_MODE in HAL.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
We need to use only four low order bits from first byte of PTP message
as that contains the message type value.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Fix timestamping in MCUX external library. The nanosecond part of the
frame timestamp wasn't saved.
Signed-off-by: Julien Chevrier <julien.chevrier@intel.com>
NXP periodically releases new versions of the MCUXpresso SDK (mcux).
Automate the process of importing mcux into zephyr with a python script.
Example usage:
$ import_mcux_sdk.py -f SDK_2.3.0_EVK-MIMXRT1050.tar.gz
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The i.MX 6SoloX SoC is a hybrid multi-core processor composed by one
Cortex A9 core and one Cortex M4 core.
Zephyr was ported to run on the M4 core. In a later release, it will
also communicate with the A9 core (running Linux) via RPMsg.
The low level drivers come from NXP FreeRTOS BSP and are located at
ext/hal/nxp/imx. More details can be found at ext/hal/nxp/imx/README
The A9 core is responsible to load the M4 binary application into the
RAM, put the M4 in reset, set the M4 Program Counter and Stack Pointer,
and get the M4 out of reset.
The A9 can perform these steps at bootloader level after the Linux
system has booted.
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
