Decoder was casting uint8_t pointers to uint64_t pointers which could
result in double word instruction which does not support unaligned
access on Cortex-M. Issue was revealed when -O3 optimization was
used instead of -Os. In size optimized version, compiler was
using word load and store instructions which support unaligned
access and issue was not visible.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Set the UNALIGNED_ACCESS_SUPPORTED only for MCU with cortex M
that are neither M0 nor M0plus
Cortex M0 or M0plus mcus do not support un-aligned address access
Signed-off-by: Francois Ramu <francois.ramu@st.com>
