add flexspi.c file to get flexspi clock rate.
Enable flexspi1 clock if don't boot from flash.
Use custom fixed mpu_regions.c file to config MPU for CM7
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
What is changed?
Use CMSIS SystemCoreClock via a dedicated flag instead of using
soc flags.
Why do we need this change?
This change is part of cleaning soc specific code out of arch folder.
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
When option ARM_MPU is disabled exclude soc\nxp\imxrt\mpu_regions.c.
It is needed to remove constraints of SRAM and FLASH size.
Fixes#70920
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
As for the IMX SOCs all the lines removed in this commit were
actually commented out so there's basically no change in code
behavior expected here.
The only affected SOCs family is therefore the Kinetis one.
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
RT11xx SOC init should check to see if the zephyr flash node is
set to a device on the FLEXSPI bus to determine if the part is running
in XIP mode. This check was incorrect, so the FLEXSPI was being
reclocked in XIP mode to 24 MHz. Fix this check so the FlexSPI is not
downclocked.
Fixes#75702
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Instead of fixing csi2rx clock frequencies, set them according to the
pixel rate got from the camera sensor.
Signed-off-by: Trung Hieu Le <trunghieu.le@nxp.com>
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
- add ITCM definitions (for LinkServer) in board.cmake
- update of soc.c to support RAM images (stack pointer)
- doc update
Change applies to both versions of the MIMXRT1170 EVK
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
IMXRT1062 bootrom reads boothdr initial vector table
from 0x60001000. In the CMAKE scatter linker scripts we put multiple
sections at offset 0x1000 in the rom. In linkers other than LD, we are
not guaranteed a particular order when placing these.
If we specify FIRST we can count on the .ivt coming first. The other
positions aren't as crucial.
From IMXRT1060RM.pdf 9.7.1
> The location of the IVT is the only fixed requirement by the ROM.
> The remainder or the image memory map is flexible and
> is determined by the contents of the IVT.
Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
Update RT5xx and RT6xx clock init to add the code
to set the I3C dividers. This code has been moved
from the I3C driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Reverts bus clock settings. Follows MCUXpresso SDK clock settings, and
sets to output of SysPLL2 PFD3 at 198 MHz.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
Imply CONFIG_INIT_AUDIO_PLL on nxp,dmic driver selection on
mimxrt685s/cm33. Make DMIC clock config dependent on the use of the
RT685's audio PLL.
Fixes a regression described in #77851.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Fix flexspi xip configuration issue regarding code relocation
due to the order of kconfig defaults being sourced
The flexspi setup was not being relocated to an on chip location
Also remove rt1060 conf file in flash common test which changes the
code relocation location to RAM, just keep as ITCM for all M7 which
as of now all have ITCM from NXP with flexspi.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Use generic hook infrastrucutre instead of custom Kconfig and hooks for
ARM.
Replace z_arm_platform_init() with platform_reset().
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
RT1011 expects it's flash configuration block at a different offset than
the rest of the RT10xx series. Add default to fix the platform not
booting.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add clock config for Flexcomm peripherals functioning as I2S interfaces.
Add MCLK clock config for the WM8904 codec located on the mimxrt595_evk
and mimxrt685_evk boards.
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
Enable DMIC clock in soc.c - attach to chip's audio PLL. Add pinmux
definitions for the DMIC peripheral. Add nodes to SoC's device tree for
the DMIC peripheral and its audio channels. Configure the DMIC
peripheral in board's device tree to enable audio capture.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
dts: arm: nxp: mimxrt1180_evk: add GPT1/2 instance into devicetree
Enable GPT1/2 clock
Add GPT1/GPT2 instances
Set GPT2 as a counter, the default frequency is 240000000
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
FCB was being relocated to the wrong location, and the flexspi clock
setup was not being relocated.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
IMXRT11XX secondary core should not deinit ENET PLL
as it could be configured by primary core.
Signed-off-by: Anders Bjørn Nedergaard <abn@polytech.com>
Consolidate the ROM RAMLOADER config to be in one place,
add a new Kconfig file to be included by the SOCs with the feature.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The CONFIG_USB_MCUX_CONTROLLER_TYPE choice config
is not necessary, let's just remove it. Theoretically,
if there was an SOC with the EHCI and LPCIP3511, then
it might cause a build error, but there is no SOC
which is supported on this legacy driver that has that.
Remove all settings of it in the SOC files.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Currently this code related to how to configure the
flash size and address when using flexspi to XIP is copy
pasted in all sort of places and ways all over the tree,
let's clean this up and have single point of control over
this configuration.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
NXP is not supporting these derivative parts in the zephyr upstream,
these references to them should therefore be removed in order to avoid
confusion.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Doesn't seem like there is any reason to be changing the
serial and ADC driver init priorities in the SOC defconfigs.
By default, clock control has priority 30, dma has priority 40,
and serial/adc have priority 50. This seems already to be the order
that is needed, and the original goal of these overrides, which
don't seem necessary anymore.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Moving RT118x kconfigs to series level instead of family level,
and cleaning up redundant declarations, and adding missing
HAS_MCUX_FLEXSPI selection.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add new RT118x device, due to structure is different from rt11xx series.
Boot header also differ from rt10xx and rt11xx, so add support for boot
container.
define new container name and new container tag
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Now that the dts/bindings filter has been removed from
Devicetree Binding area, this area serves no real purpose.
Move the include/dt-bindings files to their respective areas.
Fix some of the orphaned dts/bindings paths.
Add regex filter for any binding with "zephyr" in the name to be
in the devicetree area.
Fix the imx_spc.h file being in it's own pm/ folder instead of
power/ like the other power related headers.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Previously, the `soc.c` files for the IMXRT11xx, IMXRT5xx/CM33, and
IMXRT6xx/CM33 did not register the log module. This caused build
errors when DEBUG logging was enabled, as the `power.c` file attempted
to access a non-existent SOC log module for debug messages.
This commit fixes the issue by registering the log module in the
`soc.c` files for the specified SoCs, thereby resolving the build
errors.
Signed-off-by: Apoorv Singh <apoorv.singh@gin.de>
Fix formatting for `soc.c` files for the IMXRT11xx, IMXRT5xx/CM33, and
IMXRT6xx/CM33 by running 'clang-format'.
Signed-off-by: Apoorv Singh <apoorv.singh@gin.de>
Remove the ‘HAS_MCUX_ACMP’ Kconfig, and also remove it from
driver and soc Kconfig files. It is not needed since we already
depend on 'ACMP' enabled in the dt file, the 'HAS_MCUX_ACMP'
kconfig is a relic of the past before devicetree was stable.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
- Added a flash runner configuration for rw, mcx, lpc, kinetis and imxrt,
used for sysbuild multi-image projects like MCUBoot.
- Solved the mass erase issue.
- The sysbuild project "west flash --erase" command caused
the mass_erase->flash_img1->reset->mass_erase->
flash_img2->reset sequence.
It was fixed to the mass_erase->flash_img1->
flash_img2->reset sequence.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Currently iterable sections as per the documentation are added with
zephyr_linker_sources(SECTIONS ...) after bss/noinit.
This commit allows putting sections after common-rom.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
