Commit Graph

8 Commits

Author SHA1 Message Date
Yong Cong Sin
9109cfe346 drivers: intc: plic: convert trigger type to use Kconfig
Convert the compilation of the trigger type feature to depend
on Kconfig, following the same pattern of software-triggered
interrupt.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-09 09:41:50 +02:00
Yong Cong Sin
65fb61bc68 drivers: intc: plic: implement software-generated interrupt
Implement `riscv_plic_irq_set_pending()` to trigger a
software-generated interrupt.

The "4. Interrupt Pending Bits" of the riscv-plic specs
described the reading of the pending bits, but not the writing

Since not all PLIC implementations support software-generated
interrupt, the function is compiled only when
`CONFIG_PLIC_SUPPORTS_SOFT_INTERRUPT` is enabled on PLIC that
supports it, such as the Andes' NCEPLIC100.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-09 09:41:50 +02:00
Yong Cong Sin
c710f8892b drivers: intc: plic: implement irq affinity configuration
- Implement irq-set-affinity in RISCV PLIC.
- Added new affinity shell command to get/set the irq(s)
  affinity in runtime, when `0` is sent as the `local_irq`, it
  means set/get all IRQs affinity.
- Some minor optimizations

Updated the build_all test to build this new configuration.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
2024-10-02 13:48:05 -05:00
Yong Cong Sin
e9fa6f8b4a drivers: intc: plic: add shell cmd to get irq stats for debugging
Introduced `CONFIG_PLIC_SHELL` to enable the build of shell
debugging command to get the hit count of each interrupt
controller's IRQ line. This is especially useful when working
with dynamically installed ISRs, which will be the case for
`plic_sw`.

Example usage:

```
uart:~$ plic stats get interrupt-controller@c000000
   IRQ        Hits
==================
    10         177

uart:~$ plic stats get interrupt-controller@c000000
   IRQ        Hits
==================
    10         236

uart:~$ plic stats clear interrupt-controller@c000000
Cleared stats of interrupt-controller@c000000.

uart:~$ plic stats get interrupt-controller@c000000
   IRQ        Hits
==================
    10          90

```

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Maxim Adelman <imax@meta.com>
2023-11-24 09:23:33 +01:00
Yong Cong Sin
8db1a5add2 drivers: intc: plic: support trigger type by default and hardcode offset
Removing the edge-trigger Kconfig as it is supported by default
in the RISCV PLIC specifications.

Define the edge-trigger register offset in the driver instead
of retrieving the value from devicetree as it is not something
configurable. The value 0x1080 is defined in Andes & Telink
datasheets.

Updated build_all testcase.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2023-10-04 09:06:28 -04:00
Joshua Lilly
67268f5cbd drivers: interrupt_controller: plic: support edge triggered interrupts
This adds a check and option for edge triggered interrupts

Signed-off-by: Joshua Lilly <jgl@meta.com>
2023-07-31 10:08:52 +02:00
Kumar Gala
8423f23b9c drivers: intc: Update drivers to use devicetree Kconfig symbol
Update intc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.

We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-09-01 10:25:36 +02:00
Carlo Caione
31c5dc2230 Kconfig: Introduce RISCV_HAS_CLIC
Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-07-11 14:31:39 +02:00