Several of the values passed to the conversion failure diagnostic are
unsigned and/or 32-bit values, while all format specifiers are for
signed 64-bit integers. Make the specifiers consistent with the
argument.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
For the moment, we validate the flags on all RAM pages,
ensure that NULL is never mapped, and show that dumping
page tables doesn't crash.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Ancient 2-level IA32 page tables don't support "eXecute Disable".
Skip the test scenarios for them.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This test covers private interfaces that don't exist any more.
This will be replaced by tests of arch_mem_map() that are not
x86-specific.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This test is against infrastructure that no longer exists.
It will be replaced by generic tests for the mapping APIs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This is an extension to the existing FOR_EACH family of macros that
has a couple of twists that make it more useful in certain contexts,
as explained in the docstring.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
-Wimplicit-fallthrough=2 requires a fallthrough comment or a compiler
to tells gcc that this happens intentionally.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Added additonal checks in net_ipv6_input to ensure that multicasts
are only passed to the upper layer if the originating interface
actually joined the destination multicast group.
Signed-off-by: Philip Serbin <philip.serbin@lemonbeat.com>
update counter_basic_api to support kinetis PIT
update counter to support multi coutner driver
select PERIOD_TO_US by device name at runtime
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
MEC1501 SoC has 256KB of SRAM, but it is split into 224/32KB
for code and data, as each partition is optimized for
the access pattern. There the DTS only specifies 32KB as
data ram. The tinycrypt_hmac_prng test requires 40KB for
ztest stack. This obviously won't fit so exclude the boards
based on MEC1501 from the test.
Fixes#27572
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
One driver (mchp_xec) appears to have problems with setting the output
value before setting the direction, which can be caught if the order
of checks in the port setup function are reversed. Reconfigure the
output to a non-output state before the second test to see if that
catches the problem.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
net: route: Add prefix-based ipv6 multicast forwarding
This adds/reenables the feature of multicast routing/forwarding.
The forwarding decision is based on the added multicast routes
and the new network interface flag:
NET_IF_FORWARD_MULTICASTS.
Signed-off-by: Jan Georgi <jan.georgi@lemonbeat.com>
The NVS tests have been disabled here with commit
tests: nvs: Disable running the 0x00 test suite
(22be0d8fd5)
due to problems with flash_simulator.
With introduction of below fixes:
drivers/flash/flash_simulator: Fix flash_sim_write
(bec0c7f279)
drivers/flash/fash_simulator: Fix initialization for non-posix
(849a5432df)
the tests can be enabled back.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Disable shell print functions if the shell is not initialized.
Update tests accordingly.
Fixes#27161
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordisemi.no>
Signed-off-by: Steven Slupsky <sslupsky@gmail.com>
Add support for the Cortex-M1 ARM DesignStart FPGA reference design
running on the Digilent Arty development board.
This board uses IRQ 7 (the last IRQ) as a level-detect non-interrupt
signal to determine whether the V2C-DAPLINK shield is installed. This
IRQ line is always pending when the shield is not installed. Use IRQ 6
instead.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Wait For Interrupt (WFI) instruction ARM Cortex-M1 CPU does not
operate as a powersave instruction. It is always executed as a NOP.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Data Tightly Coupled Memory (DTCM) of the Cortex-M1 present in the
Cortex-M1 ARM DesignStart FPGA implementation is No-Execute (NX), so
__ramfunc linked in the DTCM will cause a hard fault when executed.
Use the Xilinx Block RAM (bram0) present in the reference design for
demonstrating __ramfunc instead.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Only one LOG_MODULE_REGISTER() is allowed in the files that are
linked together. The other files must use LOG_MODULE_DECLARE()
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
The on-off manager infrastructure is designed to robust asynchronous
transition between binary states where multiple clients may be
initiating a transition from any context. The actual transition is
performed using a manager that tracks the current state and pending
operations. Requests are initiated by passing a reference to an
onoff_client object that holds client state including the notification
mechanism.
This API may be used in subsystems where the transitions for a
particular driver are always synchronous and isr-ok, e.g. setting a
SoC-controlled GPIO. In this situation the full on-off manager
infrastructure is wasteful. All we need is a record of the service
state: off, active count, or error.
Add a data structure and an API that can be used to replace the onoff
manager functionality in a situation where all transitions are isr-ok
and synchronous while retaining compatible behavior from the client
perspective.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
There is nothing wrong with instance numbers and they are
recommended for use whenever possible, but this is an API
design problem because it's not always possible to get nodes
by instance number; in some cases, drivers need to get node
identifiers from node labels, for example.
Change these APIs (which are not yet in any Zephyr release)
to take node IDs instead of instance IDs.
Fixes: #26984
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add some testcases to:
Verify an user defined structure contains dlist node works,
Verify dlist "for each" style APIs work.
Signed-off-by: Ningx Zhao <ningx.zhao@intel.com>
