Commit Graph

4 Commits

Author SHA1 Message Date
Kumar Gala
3fff3852fa dts: Rename compatible arm,arm-timer to arm,armv8-timer
The compatible for the ARMv8 timer should have been arm,armv8-timer and
not arm,arm-timer.  The dts binding file name was correct, just the
compatible was wrong.  Rename dts, binding, and associated code to use
arm,armv8-timer.

Fixes #31946

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-04 07:04:28 -05:00
Sandeep Tripathy
17fcaa3fc4 drivers: timer: get ppi configuration from dt
Use device tree provided configurations for arm architecture timer
PPIs.

This fixes issue of timer ppi not working on most hardware where
edge-triggered PPI are not supported.

Signed-off-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com>
2020-05-18 11:07:57 +02:00
Kumar Gala
b7626df483 drivers: timer: arm: Convert to new DTS macros
Convert old style defines for IRQ numbers to using DT_IRQN and
DT_INST to extract IRQ numbers.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-04-28 20:40:35 -04:00
Carlo Caione
6f36300219 drivers: timer: Add per-core ARM architected timer
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.

This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).

So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00