Change reference voltage for Analog comparator to Internal reference
voltage.
Currently AIO is using External reference voltage (Reference A) and
external reference is set at 3.3V. In this usecase both reference
Voltage and AIO IP are set at 3.3V. So rising edge interrupt behaviour
will be unpredictable.
So by changing internal reference voltage to Internal (set at 1.09V)
interrupt will be generated as soon as Voltage on I/P will exceed it.
Jira: ZEP-1927
Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
AIO should be supported on more platforms. Adapt
this case to make it run on more platforms.
Also keep reference voltage for comprator as internal.
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
ztest has a number of assert style macros and used a baseline assert()
that varies from the system definition of assert() so lets rename
everything as zassert to be clear.
Change-Id: I7f176b3bae94d1045054d665be8b5bda947e5bb0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
the commit cover below apis by testing callback under RISE polarity
*) aio_cmp_configure
*) aio_cmd_disabel
Change-Id: Idc9ec3a2694950d0074b69d164ee2c1edac35c9a
Signed-off-by: jing wang <jing.j.wang@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
