Commit Graph

414 Commits

Author SHA1 Message Date
Shlomi Vaknin
2b13234e9c soc: stm32h723: fix number of irqs
Increase the number of interrupts from 150 to 163.

Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
2021-03-31 08:00:22 -05:00
Guðni Már Gilbert
849eca3412 soc: arm: added support for STM32L412XX
Add Kconfig for STM32L412XX

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-31 08:07:10 -04:00
Yestin Sun
c3fdab9ec8 soc: arm: stml32l5: entropy generator support
add entropy generator

Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
2021-03-29 13:43:20 -04:00
Francois Ramu
117796aea9 soc: arm: stm32wb low power substates
The low power states 0∕1∕2 are added to the stm32wb.
The substate-id is mapping the same Zephyr power state.
They correspond to the stm32wb low power stop0/1/2 modes.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:06:16 -04:00
Francois Ramu
43aa93723b soc: arm: stm32wb serie low power modes in debug config
The debug config will let the clocks active in STOP mode
at init.
The substate-id is mapping the same Zephyr power state.
Plus a minor fix in the Kconfig.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:06:16 -04:00
Francois Ramu
d830f2ee3d soc: arm: stm32l5 serie with low power management
The low power modes are available on the stm32l5 soc
with the mcu STOP0/1/2 modes, depending on the CONFIG_PM

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:06:01 -04:00
Francois Ramu
4d3fb9ffb2 soc: arm: stm32l5 is supporting PM with lptim
The low power timer of the soc is enabled when the PM is defined
for the STM32L5xx series.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:06:01 -04:00
Francois Ramu
fa30e879ee soc: arm: stm32l4 low power substates
The low power states 0∕1∕2 are added to the stm32l4.
The substate-id is mapping the same Zephyr power state.
They correspond to the stm32l4 low power stop0/1/2 modes.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:05:38 -04:00
Francois Ramu
acf671336f soc: arm: stm32l4 serie low power modes in debug config
The debug config will let the clocks active in STOP mode
at init.
Plus a minor fix in the Kconfig

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-26 18:05:38 -04:00
Erwan Gouriou
dda1d7ba54 soc: stm32l5: Don't disable PWR clock in soc init.
PWR clock is required for various operations.
It is enabled by default in clock control driver,
but disabled at clock init.
It appears soc init is run after clock control driver init
and hence PWR is disabled to to this piece of code at
soc init level.
Don't disable PWR here.
(But keep PWR clock enable in case of ...).

A whole clock clean up will be required later on,
but waiting for that to happen, this is the safest we can do.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-26 10:13:28 +01:00
Francois Ramu
f5df09891f soc: arm: stm32l5 config the DWT for this soc
This config CPU_CORTEX_M_HAS_DWT, is to avoid the
pragma message "Null-Pointer exception detection cannot
be configured on un-mapped flash areas"

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-03-25 14:08:12 +01:00
Thomas Stranger
c743beec64 soc/arm/st_stm32: Add additional stm32g0 socs
Add soc configuration for g05x and g0bx socs.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-03-17 11:30:20 +01:00
Erwan Gouriou
90d0eb7947 soc: stm32: Explicitly disable CORTEX_M_SYSTICK if LPTIM enabled
CORTEX_M_SYSTICK should be disabled if LPTIM is selected.
Current implementation is not efficient to do so.
Rework the way the dependency is stated.

Fixes #33342

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-16 10:23:33 -05:00
Erwan Gouriou
29f4574052 dts/arm: stm32: Don't disable systick
In some stm32 series systick was disabled in order to
allow alternate use of lptim timer as kernel low power ticker.
Doing this, dts based definition of CORTEX_M_SYSTICK Kconfig symbol
is disabled and CORTEX_M_SYSTICK was redefined with 'default y'
in stm32 soc files which makes things more complex to handle to
alternate with LPTIM activation.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-11 07:10:10 -06:00
Flavio Ceolin
98dbea0979 power: Get rid of deep sleep and sleep concepts
New power states have more granularity than deep sleep and sleep
states. Just get rid of this and keep the same behavior for now.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-07 07:59:53 -05:00
Alexandre Bourdiol
0ea63a5a17 soc: arm: st_stm32: add STM32WL support
Add STM32WL soc serie

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-19 22:39:24 -05:00
Francois Ramu
f561c87023 soc: arm: stm32 devices supporting low power modes
stm32wb and stm32l4 are devices which supports the low power
from the Kernel PM, so is the PM_DEVICE defined.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-02-19 22:38:50 -05:00
Francois Ramu
398d52de68 soc: arm: stm32l4 give a weak low power mode devices for policy
In case the policy is not available or defined by th application
the pm_policy_low_power_devices is still valid

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-02-19 22:38:50 -05:00
Francois Ramu
d7fab9b0e9 soc: arm: stm32l4 low power mode restoring clocks
The clock configuration is restored by the stm32_clock_control_init
function of the clock_stm32_ll_common driver
when exiting the low power mode

Signed-off-by: Francois Ramu <francois.ramu@st.com>


Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-02-19 22:38:50 -05:00
Francois Ramu
930df38e23 soc: arm: stm32wb give a weak low power mode devices for policy
In case the policy is not available or defined by th application
the pm_policy_low_power_devices is still valid

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-02-19 22:38:50 -05:00
Francois Ramu
6e5eb88367 soc: arm: stm32wb low power mode restoring clocks
The clock configuration is restored by the stm32_clock_control_init
function of the clock_stm32_ll_common driver
when exiting the low power mode.
Keeping the stm32wbxx_ll_utils.h in case the PLL is used for wb.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-02-19 22:38:50 -05:00
Erwan Gouriou
5ba5dbc333 soc: stm32: Fix backup_sram clock enable
This driver missed #32228 PR that converted STM32 drivers
to use DEVICE_DT_GET for clock activation.
Due to the renaming of STM32_CLOCK_CONTROL_NAME to
STM32_CLOCK_CONTROL_NODE, driver could not compile anymore

Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-17 12:24:14 -06:00
Giancarlo Stasi
dd94c3054b soc: arm: stm32l4: wakeup from stop clock selection based on sysclk
When exiting Stop mode, if system clock is MSI, MSI oscillator is
selected as wakeup from stop clock; otherwise HSI16 oscillator is
selected.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2021-02-15 08:19:27 -05:00
Gerard Marull-Paretas
10532a5310 soc: arm: st_stm32: add support for STM32 backup SRAM
Add support for backup SRAM initialization found in multiple STM32
microcontrollers. Linker script facilities are also provided to make it
easy to define variables in the backup SRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-02-15 08:04:24 -05:00
Manuel Forcén Muñoz
95c7b58330 dts: arm: st: add support for STM32F205xx SOC
STM32F205xx device tree include files added.
Tested properly in a custom board.

Signed-off-by: Manuel Forcén Muñoz <manuforcen@gmail.com>
2021-02-14 22:10:28 -05:00
Detlev Zundel
979c748e49 soc: arm: st_stm32f2x: Convert Kconfig input prompt to uppercase
The STM32F2x was the only one of the STM32 series with a lowercase
input prompt.  This looks odd in the SoC selection in 'menuconfig'.

Signed-off-by: Detlev Zundel <dzu@member.fsf.org>
2021-02-05 09:48:30 -05:00
Erwan Gouriou
9abff32bdc drivers/watchdog: stm32: Select watchdog using compatible
Rather than Kconfig vendor symbols, select stm32 watchdog using
compatible.
So user only has to enable the requested node and set
CONFIG_WATCHDOG=y.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-02-02 08:15:51 -05:00
Giancarlo Stasi
5b025d0d9b soc: arm: stm32l4: Fix stm32 ll header list
PM stm32 ll header list was not adequate for L4 debug builds.
Add _system.

Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
2021-02-02 07:18:16 -05:00
Flavio Ceolin
321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
d21808b0b1 power: Remove residency and states from Kconfig
Residency time and power states are defined using device tree now.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin
579f7049c7 power: Move pm subsystem to new power states
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Erwin Rol
cceff836ae soc: arm: stm32: Remove mem pool selection
Since the use of kmalloc was removed from the DMAMUX driver
there is no need for a memory pool anymore.

Signed-off-by: Erwin Rol <erwin@erwinrol.com>
2021-01-15 10:27:43 -05:00
Maureen Helm
334014a8fe linker: arm: Fix cortex_m dtcm and ccm sections to work with relocation
Adds missing DTCM_ADDR and CCM_ADDR macros needed by the linker script
generated by scripts/gen_relocate_app.py.

Moves associated bss_end, noinit_end, and data_end linker symbols to
account for section relocation. Without this change, the section sizes
calculated in z_bss_zero() and z_data_copy() are incorrect.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-15 14:51:20 +01:00
Noelle Clement
220316c937 soc: arm: stm32: Add support for STM32L152xC SoCs
STM32L152xC SoC differs from other L1 SoCs in RAM (32KiB) and
flash (256KiB) size, EEPROM size (8Kib) and amount of interrupts
(57, see STM32Cube). Devicetree and Kconfig support.

Signed-off-by: Noelle Clement <noelleclement@hotmail.com>
2021-01-14 16:22:17 -06:00
Hans Unzner
c99ae8d456 soc: arm: added support for STM32F410XX
Add Kconfig for STM32F410XX

Signed-off-by: Hans Unzner <hansunzner@gmail.com>
2021-01-13 09:07:52 -05:00
Erwan Gouriou
b226f1d446 drivers/dma: stm32: Base Konfig symbols on dts compatible status
In order to simplify the handling of DMA_STM32_V1/V2 and DMAMUX_STM32
symbols, set them directly based on related compatible status.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-01-11 16:49:39 -05:00
Attie Grande
65e259fb48 dts: arm: stm32: add support for STM32F105xx parts
The STM32F105xx is effectively an STM32F107xx without Ethernet. As such,
it's possible to include the STM32F105's device tree from STM32F107, and
add in any additional nodes (currently just DMA2, though according to
the datasheet, this may be supported by the STM32F105xx and other parts
too).

Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
2021-01-10 12:42:40 -05:00
Flavio Ceolin
8fe3866e19 power: rename _pm_power_state_ -> pm_power_state
Leftover from old renaming commits. This function is not private and
should not start with underscore.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-04 09:02:23 -05:00
Sebastian Schwabe
1ec13cedaa soc: arm: st_stm32: stm32f3: Add support for STM32F303x8
This commit adds the soc config for the STM32F303x8.
Add the STM32F303x8 as choice to the Kconfig.soc.
Fixing indention error in Kconfig.soc.

Signed-off-by: Sebastian Schwabe <sebastian.schwabe@mailbox.tu-dresden.de>
2020-12-20 10:14:03 -05:00
Nicolas VINCENT
0dc3153e50 soc: stm32h7: define rom offset when using mcuboot
Set rom offset to 0x400 if application is compiled with
CONFIG_BOOTLOADER_MCUBOOT.
Please note that mcuboot is not yet supported on stm32h7 devices

Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
2020-12-14 16:47:05 +01:00
Anas Nashif
72cab9a2d0 power: sys_set_power_state -> pm_power_state_set
remove sys_ prefix and rename API to be more consistent with guidelines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Anas Nashif
e0f3833bf7 power: remove SYS_ and sys_ prefixes
Remove SYS_ and sys_ from all PM related functions and defines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Anas Nashif
dd931f93a2 power: standarize PM Kconfigs and cleanup
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE

and use PM_ as the prefix for all PM related Kconfigs

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Anas Nashif
d7ffb88683 Revert "soc: stm32h7: define rom offset when using mcuboot"
This reverts commit 03fbf09f47.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-07 19:02:48 -05:00
Nicolas VINCENT
03fbf09f47 soc: stm32h7: define rom offset when using mcuboot
Set rom offset to 0x400 if application is compiled with
CONFIG_BOOTLOADER_MCUBOOT.
Please note that mcuboot is not yet supported on stm32h7 devices

Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
2020-12-07 16:16:11 -05:00
Petri Oksanen
349c50a682 soc: arm: add support for stm32h753xx
STM32H753xx is similar to STM32H743xx except that it has crypto/hash
hardware acceleration and the memory configuration is always 2Mbytes
flash and 1Mbyte RAM.

Signed-off-by: Petri Oksanen <petri@iote.ai>
2020-12-03 16:53:58 +02:00
Martin Jäger
c741d7598a soc: arm: stm32xx: soc.h: final cleanup of LL headers
Final cleanup to unify soc.h files and remove remaining non-generic
LL headers.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
9e316e6040 drivers: interrupt_controller: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
d5aff7ba3c drivers: clock_control: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Martin Jäger
0636b42c81 drivers: usb: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00