Fixes#29831: Implements flash driver for stm32h7 devices.
The driver is independant from the other stm32 families (flash_stm32.c),
only the header interface is (mainly) common.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
Add weak function to check flash configuration.
On stm32g4: single bank configuration not supported
when dual bank capable.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Remove hardcode bank1 page limit (128) which is not always valid
(not valid for soc stm32g474rct)
Manage bank1/2 discontinuity when flash is Dualbank and
flash size is lower than 512K.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When flash is Dualbank and flash size is lower than 512K,
then there is a discontinuity between bank1 and bank2.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
- Remove SYS_ prefix
- shorten POWER_MANAGEMENT to just PM
- DEVICE_POWER_MANAGEMENT -> PM_DEVICE
and use PM_ as the prefix for all PM related Kconfigs
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move users that are DEVICE_DT_DECLARE(DT_DRV_INST(n, ...)) to
DEVICE_DT_INST_DECLARE(n, ...) and similar for DEVICE_DT_DEFINE.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes#29831: Implements flash driver for stm32h7 devices.
The driver is independant from the other stm32 families (flash_stm32.c),
only the header interface is (mainly) common.
Signed-off-by: Nicolas VINCENT <nicolas.vincent@vossloh.com>
The exclusive bound for parameter headers needs to be incremented as
the nph parameter is not the number of parameter headers: 0 means one
header.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The driver was using CONFIG_SRAM_BASE_ADDRESS as the value used to
recognize whether source buffer is in RAM. This label provide the
base address of the image SRAM, and not the base of actual HW SRAM.
This patch uses nrfx_is_in_ram() instead.
fixes#29467
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
The at45 and nor spi flash drivers needs flash layout to work.
Probably tested were conducted with SoC that already selects
the FLASH_HAS_PAGE_LAYOUT for internal flash drivers. This add
the missing dependency.
Fixes#28094.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Clearing the PSIZE bits in the FLASH CR should not invert the mask
defined in stm32f4xx_hal_flash.h (#define CR_PSIZE_MASK 0xFFFFFCFFU)
Signed-off-by: Justin Brederveld <jmbrederveld@gmail.com>
Report errors using logging subsystem so it is easier to
see the error location while debugging code.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
Improve the way the nrf_qspi_nor driver configures the SCK frequency,
to properly support QSPI also on nRF53 Series SoCs that use a different
base clock frequency (96 MHz).
Add also a relevant configuration in the spi_flash sample so that it
can run on the nRF5340 DK.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Restore the flash write proectction after disabling it for
flash write and erase shell commands.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
Flash drivers are free to re-enable write protection after a write or
erase operation is complete. Therefore write protection has to be
disabled before any such operation.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
The second argument of this foonction is a bool, so passing 0 and 1
is incorrect.
Coccinelle script:
@@
expression e;
@@
flash_write_protection_set(e,
(
- 0
+ false
|
- 1
+ true
)
)
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
The condition used to detect presence of optional devicetree
properties that specify read and write opcodes was inadvertently
changed to something that will never be true. Update the check and
the property extraction to restore the original behavior.
Fixes#28635.
Signed-off-by: Stephan Walter <stephan@walter.name>
Named choice is needed in order to be able to extend it
in other modules.
Closes: #28559
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
The driver is able to write with 32-bits word alignment of size
and offset, apart form sub-word writes for which it can write
part of word to aligned offset (which is a hack).
fixes#26729
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
timeslice terminology were used in connection with synchronization
using ll BLE ticker.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Rework ticker synchronization using newly introduced
radio synchronization API.
In kconfig synchronization using ll ticker become choice
option.
If CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE is enabled the erase
timing is changed so intervals become similar to slots duration.
Previously interval was always ~90 ms, which looks like it was kept
so disproportional by oversight while the partial erase was
introduced.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Extract synchronization procedures using LL BLE controller
ticker to newly added synchronization API.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Introduced API which allows to decouple radio synchronization
mechanism from NVMC driver.
New API will allows to replace synchronization mechanism if required.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Replace hardcoded sector size value in sample with sector-size
property added in dts binding file
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
When building flash shell sample we get:
flash_stm32wbx.c:23:10: fatal error: shci.h: No such file or directory
23 | #include "shci.h"
Fix this by adding ifdef protection around inclusion of shci.h.
Fixes#28036
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Implement algorithm described in STM32 AN5289
with implementation proposed in STM32 Cube Application:
BLE_RfWithFlash
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Passing the device's data is sufficient to be used by the HAL callback
function.
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.
A coccinelle rule is used for this:
@r_const_dev_1
disable optional_qualifier
@
@@
-struct device *
+const struct device *
@r_const_dev_2
disable optional_qualifier
@
@@
-struct device * const
+const struct device *
Fixes#27399
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The spi_flash_w25qxxdv driver has been superseded by the generic
spi_nor driver for over a year. The only non-refactoring change to
the W25Q driver in the last 18 months was done to support a backport
to 1.14.
All devices supported by spi_flash_w25qxxdv driver are expected to be
supported by the spi_nor driver, using the standard `jedec,spi-nor`
devicetree compatible. No in-tree devicetree files make use of this
driver.
Remove the confusion about which driver to select by removing the
unmaintained redundant driver.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Expose the internal JESD216 function used to read data from the SFDP
region, and another function to read the JEDEC ID.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Some flash drivers are capable of issuing a JESD216 READ_SFDP command
to read serial flash discoverable parameters. Allow applications and
utilities access to API that reads the JEDEC ID from those devices.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Some flash drivers are capable of issuing a JESD216 READ_SFDP command
to read serial flash discoverable parameters. Allow applications and
utilities access to that capability where it's supported.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
This commit reworks the SPI NOR driver to be more flexible in how
flash device configuration is obtained. Three alternatives are
supported:
* MINIMAL takes only the flash size from devicetree. The erase sizes
are hard-coded to the traditionally supported instructures.
* DEVICETREE requires that the data from the device's JESD216 Basic
Flash Parameters table be provided through devicetree. This
supports multiple page sizes and erase configurations, and lays a
foundation for significant enhancements in the future including
4-byte address, sleeping while waiting for operation completion, and
other features that are described by JESD216 parameters.
* RUNTIME requires nothing from the devicetree node, instead reading
the Basic Flash Parameters from the device at runtime. It extends
DEVICETREE by allowing the same firmware to run on boards with
different flash chips.
For MINIMAL and DEVICETREE the JEDEC ID from the devicetree node is
checked against the value read at runtime to confirm that the device
configuration is accurate.
The default SFDP source is MINIMAL.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use the new SFDP infrastructure to read the supported erase type sizes
and commands from the Basic Flash Parameters block. This removes the
need for explicit reference to most block sizes from this driver.
We're also seeing devices where the page size is not 256 bytes.
Accommodate them.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The spi_nor flash interface was designed for flash devices that use a
standard SPI interface to devices that are compatible with the Micron
M25P80 serial flash, identified in Linux as compatible jedec,spi-nor.
The JEDEC Serial Flash Discoverable Parameters standard (JESD216) was
designed to allow these devices to be self-describing. As we are
increasingly being asked to support flash memories that do not use
"standard" erase sizes or commands we need data structures and helper
functions to extract information about a flash interface at runtime.
For some of these devices the commands hard-coded in the current
implementation are simply wrong.
Define generic structures that support the SFDP hierarchy and the core
Basic Flash Parameters table. The description will also support
SPI-NAND and xSPI devices that conform to the JESD216 standards.
Add bitfield values and helper functions to extract some information
that drivers might need from JESD216 fields. At this time only
information that is likely to be used is extracted; more may be added
in the future.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The one provided in the spi_nor.h header is inappropriate for this
device, which doesn't support be32k. Also that definition is moving
into the spi_nor implementation file.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Fix a regression that caused flashing on nRF51x Series to stall
the Bluetooth low energy controller and flashing under
BT_CTLR_LOW_LAT option.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
FLASH_TYPEERASE_PAGES is null and doesn't represent a bit in the
register, thus this instruction has no effect.
It must be replaced by FLASH_CR_PER which is the bit that should
be cleared.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Added function read_non_aligned that reads data under
non-aligned flash addres to non-aligned read buffer of any size.
Signed-off-by: Mateusz Syc <Mateusz.Syc@nordicsemi.no>
In case of control register lock, driver should return the error
immediately. Otherwise, error is later overwritten by
'rc = flash_stm32_wait_flash_idle(dev);'
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Fix flash operation timeout due to incorrect use of
secondary ticker to abort any radio in use. Ticker id 0
is reserved for split controller's pipeline preempt timeout.
Using the same ticker id caused the secondary ticker to
not be started if controller is using the same ticker id
for pipeline preempt timeout.
Fixes#26333.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
LPC55xxx SoCs don't allow reading erased areas, the flash memory
controller (FMC) will trigger an ECC error for that area. To prevent
reading unwritten areas the low level FMC command of margin checking is
used, this will fail if the area to be read is not correctly written
(margin_check) or area is erased (blank_check).
In the case of an erased page, we return dummy data so the application
can program that area.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
It is annoying to read just a single word at a time. Update this
command to print any amount of data. This uses byte format at present.
We could perhaps support something like:
flash read.8
flash read.16
flash read.32
to chose the size.
Example output (with line breaks to keep within git-style limit):
$ flash read FLASH_CTRL 0 20
00000000: 20 25 00 20 1d 26 00 08 69 68 00 08 45 26 00 08
| %. .&.. ih..E&..|
00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
|........ ........|
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver blocks on a semaphore to receive notification when an
operation is complete, so requires CONFIG_MULTITHREADING=y.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Add support for STM32L0X using the generic STM32 backend. This is
quite a significant change since the L0 series uses a slightly
different flash controller. Refactor the generic backend to better
support different block sizes and the L0's register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Several STM32 chips have identical chip-specific code that has been
duplicated in different source files. Unify the F0x, F1x, and F3x to
use a single implementation.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
When writing buffers larger then page-size, there is already a routine
that checks wrap around and adjusts offsets, but this routine was
missing incrementing the data pointer, which would results in
rewriting the same page-size bytes over and over. This adds the proper
increment code.
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
Silence a gcc warning due to possible return of unitialized variable in
erase function. This could only happen if size == 0, which doesn't seem
likely, but initializing the variable to zero should fix the issue.
Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
There is a typo in the function pointer assigned to get_parameters. It
should be flash_sam_get_parameters.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Commit id a538dcd8f8 got rid of the usage of these pointers so they are
useless now and can be removed in this drivers.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
For some reason, use of the DT_NUM_INST macro in this driver was not
replaced with DT_NUM_INST_STATUS_OKAY. In consequence, this driver
could not be compiled successfully. Furthermore, because this now
undefined macro had been used inside UTIL_LISTIFY, gcc was not even
able to report an error, instead the compilation just "froze".
This patch replaces UTIL_LISTIFY(DT_NUM_INST()) with more appropriate
in this context DT_INST_FOREACH_STATUS_OKAY. It also adds an apparently
missing inclusion of sys/byteorder.h.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
If shell is enabled then enable all sub-shells if their dependencies are
satisfied. This was done for some modules and subsystems but was not
consistent.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Several shell modules use cloned code to iterate over all devices and
identify the nth instance that meets some criteria. The code was
repetitive and included various errors. Abstract to a helper function
that performs the check consistently.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Some flash controllers support operations only when buffers are word
aligned. An example of such is nRF QSPI, which checks input buffer using
nrfx_is_word_aligned() function inside nrfx_qspi_write().
Align test array on 4 bytes, so we will gain compatibility with more
flash controllers, including nRF QSPI.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
With addition of flash_parameters structure, and supporting API call
to retrieve it, it is no longer needed to store write_block_size as
a part of flash_driver_api and it should be part of flash_parameters.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The Nordic QSPI peripheral uses DMA transfers so data to write must be
located in SRAM. Add a Kconfig that enables copying data from NVMC to
a stack SRAM buffer so it can be written to flash.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
mcumgr and possibly mcuboot write single byte values to update the
state of objects. Rather than fail to do the write of values too
short for this peripheral detect the situation and write from a stack
buffer that meets the length criteria.
Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Currently user is forced to configure an array of 4 IO pins. This makes
no sense when there are only 2 IO pins connected on board.
Configure 3rd and 4th pin in internal structure as
NRF_QSPI_PIN_NOT_CONNECTED if only 2 were specified in device-tree.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Also reduce the check that the affected region is within the device
span to its minimal equivalent conditions.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Erase can only succeed if the address is sector-aligned, and the span
to erase is an integer multiple of the sector size. Validate this
before starting the process of erasing things.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Having a completion wait function release a lock internally only when
the operation fails is confusing. Remove that feature, and make the
lock and unlock operations explicit and paired.
This makes it much more clear how to properly handle transactions that
require multiple calls to the HAL.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The stack buffer used to pad small reads must still be aligned to a
word address as the underlying driver uses DMA transfers with that
requirement. Don't assume the compiler will naturally align it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The check for small transfers inadvertently allowed a transfer of zero
bytes, which should be an error (invalid parameter).
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
mcuboot and possibly other tools read single byte values to determine
the state of objects. Rather than fail to do the read of values too
short for this peripheral detect the situation and read into a stack
buffer that meets the length criteria, and on success copy the data
into the provided buffer.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:
- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
for macros which are equivalent to
DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name
Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.
This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Use DT_INST_SPI_DEV_HAS_CS_GPIOS() in drivers to determine if we should
utilize CS_GPIO base SPI chipselect handling. This allows us to remove
Kconfig option for this feature.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
When the device driver model got introduced, there were no concept of
SYS_INIT() which can be seen as software service. These were introduced
afterwards and reusing the device infrastructure for simplicity.
However, it meant to allocate a bit too much for something that only
required an initialization function to be called at right time.
Thus refactoring the devices structures relevantly:
- introducing struct init_entry which is a generic init end-point
- struct deviceconfig is removed and struct device owns everything now.
- SYS_INIT() generates only a struct init_entry via calling
INIT_ENTRY_DEFINE()
- DEVICE_AND_API_INIT() generates a struct device and calls
INIT_ENTRY_DEFINE()
- init objects sections are in ROM
- device objects sections are in RAM (but will end up in ROM once they
will be 'constified')
It also generate a tiny memory gain on both ROM and RAM, which is nice.
Perhaps kernel/device.c could be renamed to something more relevant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Add a driver that can handle several instances of AT45 family chips,
which are enabled by specifying DT nodes for them with the "compatible"
property set to "atmel,at45" and other required properties like JEDEC
ID, chip capacity, block and page size etc. configured accordingly.
The driver is only capable of using "power of 2" binary page sizes in
those chips and at initialization configures them to work in that mode
(unless it is already done).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The sam0 has a page size of 64 bytes, making it incompatible with
the nvs driver that specifies a maximum write block size of
32 bytes. When CONFIG_SOC_FLASH_SAM0_EMULATE_BYTE_PAGES is set,
it should report a write block size of 1 byte, which is compatible
with nvs.
Signed-off-by: Adam Serbinski <aserbinski@gmail.com>
The dpd-wake-sequence has a value that is an array of three integers,
which was formerly indexed by a suffix on the property name. This was
updated to new accessors but failed to separate the index from the
property name. Update the access idiom.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear. As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace DT_FLASH_DEV_NAME with DT_CHOSEN_ZEPHYR_FLASH_CONTROLLER_LABEL.
We now set zephyr,flash-controller in the chosen node of the device
tree to the flash controller device.
NOTE: For a SoCs with on die flash, this points to the controller and
not the 'soc-nv-flash' node. Typically the controller is the
parent of the 'soc-nv-flash' node).
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The code generally invoked qspi_wait_for_completion() within a locked
region without verifying that an operation was successfully initiated.
This caused a deadlock whenever the operation failed, e.g. because the
data buffer was not 4-byte aligned. Update that function to take the
result of the operation and either wait for completion or release the
lock, depending on its value.
Also uniformly use the correct type for Nordic HAL error values, and
refactor the erase module so that the correct values are displayed in
the diagnostic when something goes wrong.
Also check the alignment requirements for the flash address and
transfer size, which are highly constrained on this device. This
driver also requires 4-byte aligned data buffer; this is checked in
the Nordic HAL.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Instead of various series compatibles, use single stm32 generic
compatible as reference for stm32 flash driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
