bartoszek/zephyr
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6 Commits

Author SHA1 Message Date
Francois Ramu
f3c681166b drivers: clock_control: stm32g0 soc enables the PWR clock 
After system reset, the PWR interface clock must be enabled
by setting the PWREN bit of the RCC_APBENR1
This sequence is needed to use the RTC.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2021-01-06 08:09:47 -06:00
Martin Jäger
d5aff7ba3c drivers: clock_control: stm32: use generic LL headers 
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
 2020-11-30 15:50:03 +01:00
Peter Bigot
0b0d2e640b treewide: use full path to clock_control/stm32_clock_control.h header 
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
 2020-01-26 17:52:12 +01:00
Peter Bigot
bbb00d0eb7 treewide: use full path to clock_control.h header 
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
 2020-01-26 17:52:12 +01:00
Kumar Gala
24ae1b1aa7 include: Fix use of <misc/FOO.h> -> <sys/FOO.h> 
Fix #include <misc/FOO.h> as misc/FOO.h has been deprecated and
should be #include <sys/FOO.h>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2019-12-10 08:39:37 -05:00
Francois Ramu
624c566306 drivers: clock_control: Add STM32G0XX clock support 
Add clock support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com
Signed-off-by: Francois Ramu <francois.ramu@st.com>
 2019-07-05 10:35:55 -05:00