Commit Graph

13 Commits

Author SHA1 Message Date
Flavio Ceolin
9fd4ea91b7 coccinelle: Remove extra semicolon
coccicheck --mode=patch --cocci=semicolon.cocci

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-25 11:35:30 -05:00
Kumar Gala
731420c793 boards: arm: arty: Enable gpio is a feature on board yaml
There is a GPIO driver for use with arty so enable the GPIO feature in
the board yaml to get some testing of it.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-13 19:26:36 -05:00
Peter A. Bigot
fb71c6f47e boards: arty: document source for fpga bitstream partition size
At this time there's no clear need to support anything other than the
A35T variant, but to simplify future extension show where the
partition size came from and document the corresponding parameter for
the A100T variant.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-09-29 13:48:59 -05:00
Henrik Brix Andersen
4ca1f4d898 boards: arm: arty: note which boards can use the pre-built bitstream
Add a note on which Arty boards can be programmed with the pre-built
FPGA bitstream.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-22 11:25:03 -05:00
Henrik Brix Andersen
40c71cbe47 boards: arm: arty: add reference to the v2c_daplink shield
Add a reference to the V2C-DAPLink shield from the Digilent Arty board
documentation.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-04 17:37:22 +02:00
Henrik Brix Andersen
3ffb779865 boards: arm: arty: add missing default for enabling SPI support
Add missing default for enabling CONFIG_SPI if CONFIG_FLASH is
enabled. This is needed for CONFIG_SPI_NOR.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-04 17:37:22 +02:00
Henrik Brix Andersen
4c57f3400a boards: arty: add support for daplink qspi mux
The ARM Cortex-M1/M3 DesignStart FPGA reference designs support booting
from an off-board, memory-mapped QSPI NOR flash device. The V2C DAPlink
shield from ARM Ltd. provides support for this feature.

If the board/shield is not configured for booting from the QSPI NOR
device, that same device is available as a regular QSPI NOR flash
device.

The presense of a shield configured for QSPI NOR flash boot is indicated
through an IRQ line used as a level-detect, non-interrupt signal.

Introduce a board specific devicetree binding for the DAPLink QSPI MUX
and provide a board specific API accessing it. Automatically set the
QSPI MUX to to provide regular QSPI NOR flash access if the board/shield
is not configured for memory-mapped QSPI NOR flash boot.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-04 17:37:22 +02:00
Henrik Brix Andersen
ba2bafc80d boards: arm: arty: reduce number of IRQs from 8 to 7
The ARM Cortex-M1/M3 DesignStart FPGA reference designs both use IRQ 7
(the last IRQ line) as a level-detect non-interrupt signal to determine
whether the V2C-DAPLINK shield is installed. Thus IRQ 7 cannot be used
as a regular IRQ line.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
80cb465a89 boards: arm: arty: add arm cortex-m3 designstart fpga board definition
Add board definition for the ARM Cortex-M3 DesignStart FPGA reference
design running on the Digilent Arty development board.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
77da848d7b boards: arm: arty: add missing cpu node to devicetree
Add the missing Cortex-M1 CPU node to the devicetree.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
4fe779848f boards: arm: arty: refactor board definition to prepare for cortex-m3
Refactor the ARM Cortex-M1 DesignStart FPGA/Digilent Arty A7 board
definition to prepare for Cortex-M3 support.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
82a1075e7f boards: arm: arty: designstart_m1: enable Xilinx AXI Quad SPI instances
Add the Xilinx AXI Quad SPI IP instances present in the ARM Cortex-M1
DesignStart FPGA reference design and enable the instance connected to
the onboard SPI NOR flash containing the FPGA configuration bitstream.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-26 12:32:27 +02:00
Henrik Brix Andersen
75713c39a1 boards: arm: arty: add board definition Cortex-M1 on the Digilent Arty
Add board definition for the ARM DesignStart FPGA Cortex-M1 reference
design on the Digilent Arty FPGA development board.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00