Commit Graph

60 Commits

Author SHA1 Message Date
Wayne Ren
ef224ce1cd ARC: make the assembly codes compatible
Make the assembly codes compatible with both GNU
and Metaware toolchain.

* replace ".balign" with ".align"
  ".align" assembler directive is supposed by all
  ARC toolchains and it is implemented in a same
  way across ARC toolchains.
* replace "mov_s __certain_reg" with "mov __certain_reg"
  Even though GCC encodes those mnemonics and even real
  HW executes them according to PRM these are restricted
  ones for mov_s and CCAC rightfully refuses to accept
  such mnemonics. So for compatibility and clarity sake
  we switch to 32-bit mov instruction which allows use
  of all those instructions.
* Add "%%" prefix while accessing registers from inline
  ASM as it is required by MWDT.
* Drop "@" prefix while accessing symbols (defined in C
  code) from ASM code as it is required by MWDT.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>

/#
2020-09-05 10:22:56 -05:00
Wayne Ren
84cdfa271d arch : arc: clean up of assembly codes
* update comments to match latest codes
* add extra comments for some assembly, macros
* use macro to replace duplcated codes
* remove unused codes, lables, symobols

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-03-12 13:02:17 -04:00
Wayne Ren
3f88ddd549 arch: arc: overhaul the thread switch code in epilogue of irq and exception
overhaul the thread switch code in epilogue of irq and
exception handling:
* add z_arch_get_next_switch_handle to call z_get_next_switch_handle,
  let the scheduler to decide the switch thread. This will also cover
  the case of SMP.

* put lots of common codes in macros for thread switch to improve
  the maintainablity, readability.

* clean up of some lables to make codes easier to understand

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-03-12 13:02:17 -04:00
Wayne Ren
5f0650b596 arch: arc: fix the bug of blt in syscall
blt is signed comparsion, if r6 is a negative number created by
malicious code, it will pass the check, bring a secure risk.

use blo (unsinged comparison) to do the check.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-03-09 10:08:18 +02:00
Wayne Ren
0d7769f3b8 arch: arc: fix the bug that idle thread blocks other threads
* for COOP_SCHED case, i.e., PREEMPT_ENABLED is not enabled, the
  idle thread will block other threads which is not correct.

* remove the check of PREEMPT_ENABLED in the epilogue of irq and
  exception handling. Let the scheduler (should_preempt()) decide
  whether the thread should be preempted.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-02-13 09:39:25 -08:00
Wayne Ren
7249fbf5ad arch: arc: fix the bug of irq_offload
* remove irq lock/unlock which is not needed because of
  the protection of offload_sem in irq_offload
* simplify the assembly codes related irq_offload, remove
  the thread switch logic
* the old codes may do thread switch in the epilogue of
  irq_offload handling with int locked, this is not correct
  may cause irq_offload related codes crash.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2020-02-12 14:30:38 +02:00
Andrew Boie
3f1cf02e05 arc: rename some arc-specific functions
These are not part of the generic kernel to
architecture interface, rename appropriately to
reflect they are ARC-specific.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Wayne Ren
eb2422ed76 arch: arc: enlarge the exception handling stack
after recent changes in zephyr's fault handling, e.g. use log
to repace printk, it requires more stack to exception handling, or
the stack overflow may happen and crash the system.

this commit adds a kconfig option for exception stack size with
a larger default size.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-10-09 14:21:56 -04:00
Wayne Ren
56650aff7e arch: arc: fix the bug in prologue of sys call handling
* the old codes may not save the caller saved regs correctly,
  e.g. r7- r12. Because the sys call entry is called in the form
  of static inline function. The compiler optimizations may not save
  all the caller saved regs.

* new codes use the irq stack frame as the sys call frame and gurantee
  all the called saved regs are pushed and popped correctly.

* the side effect of new codes are more stack operations and a little
  overhead.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-10-01 09:22:30 -04:00
Wayne Ren
a75b0014fb arc: replace 32-bit instructions with possible 16-bit instructions
replace 32-bit instructions with possible 16-bit instructions to
get better code density

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-09-08 12:36:02 +02:00
Wayne Ren
44c917e6b2 arch: arc: fix the bug that interrupt stack is not switched
For the old codes, if nest interrupts come out after _isr_wrapper
and before _check_nest_int_by_irq_act, then multi-bits in irq_act
will be set, this will result irq stack will not be switched in
correctly

As a fix, it's still need to use nest interrupt counter to do
interrupt stack switch as before

The difference is in the past exc_nest_count is used, but here
_kernel.nested/_kernel.cpus[cpu_id].nested is used.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
5a73bf3966 arch: arc: fix and optimize the handling of SECT_STAT.IRM
For arc processor equiped with secureshield, SEC_STAT.IRM
bit should be recorded, it determins which mode irq should
return

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-28 08:22:14 +02:00
Wayne Ren
36a56e7a8f arch: arc: fix a bug when CONFIG_SMP is enabled
the bug is forgot to fixes, when CONFIG_SMP is enabled,
it will cause build error

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-11 21:18:38 +02:00
Wayne Ren
cca39204c2 arch: arc: add initial support of ARC TEE
* it's based on ARC SecureShield
* add basic secure service in arch/arc/core/secureshield
* necesssary changes in arch level
   * thread switch
   * irq/exception handling
   * initialization
* add secure time support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-10 17:45:22 +02:00
Wayne Ren
61d570bb38 arch: arc: add extra handling about exception raised in interrupt
exception, different with irq offload,  may be raised interrupt
handling, e.g.
  * z_check_stack_sentinel
  * wrong code

we need to add specific handling of this case in exception handling

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-09 20:11:58 +02:00
Wayne Ren
0757583892 arch: arc: the caculation of exception stack is wrong
after appling the new "_get_curr_cpu_irq_stack" in _exc_entry,
the caculation of exception stack is wrong, this will
cause stack overflow, make the exception handling corrupt.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-09 20:10:29 +02:00
Wayne Ren
e11be42558 arch: arc: add initial support of SMP
* modify the reset flow for SMP
* add smp related initialization
* implement ipi related functions
* implement thread switch in isr/exception

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-08-07 12:21:00 +02:00
Wayne Ren
733c11b11b arch: arc: use IRQ_ACT to check nest interrupt
* use IRQ_ACT to check nest interrupt
* implement an asm macro for nest interrupt check
* no need to use exc_nest_count, remove it

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-07-30 10:16:38 -07:00
Wayne Ren
abac940c43 arch: arc: remove arc_exc_saved_sp used in exc handling
* as ilink has a copy in ERET, it can be reused as a gp
* use ilink to do the job of arc_exc_saved_sp to save 4 bytes
  and save some cycles because no load/store of memory
* it will make code scalable, e.g. for SMP, no need to
  define variables for each core

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-07-30 10:16:38 -07:00
Wayne Ren
890b9ebab7 arch: arc: implement z_arch_switch to replace swap
* here use new style z_arch_switch,i.e. CONFIG_USE_SWITCH
to replace old swap mechnism.

* it's also required by SMP support

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-06-28 09:56:03 -04:00
Patrik Flykt
7c0a245d32 arch: Rename reserved function names
Rename reserved function names in arch/ subdirectory. The Python
script gen_priv_stacks.py was updated to follow the 'z_' prefix
naming.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Andrew Boie
b4987a2c57 arc: fix build failure missing arc_exc_saved_sp
Instantiate this in C domain instead.

Fixes: #15035

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-29 18:41:46 -04:00
Wayne Ren
eba78548da arch: arc: add the handling of mpu stack guard exception
* mpu stack guard exception is a kind of mpu violation exception
* use SW way to distingusih it from other mpu vioation exception

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-29 16:15:10 -04:00
Wayne Ren
bcdfc9f1ac arch: arc: fix the unaligned declaration of saved_value
the original declaration is not aligned to 4 bytes.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2019-03-22 07:21:11 -05:00
Wayne Ren
f3d2893344 arch: arc: stack check will be disabled in exception
stack check bit of status32/sec_stat will be cleared
automically in exception entry.

so remove the redundent codes

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-08-22 07:57:11 -07:00
Sebastian Bøe
1186f5bb29 cmake: Deprecate the 2 symbols _SYSCALL_{LIMIT,BAD}
There exist two symbols that became equivalent when PR #9383 was
merged; _SYSCALL_LIMIT and K_SYSCALL_LIMIT. This patch deprecates the
redundant _SYSCALL_LIMIT symbol.

_SYSCALL_LIMIT was initally introduced because before PR #9383 was
merged K_SYSCALL_LIMIT was an enum, which couldn't be included into
assembly files. PR #9383 converted it into a define, which can be
included into assembly files, making _SYSCALL_LIMIT redundant.

Likewise for _SYSCALL_BAD.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2018-08-15 11:46:51 -07:00
Andrew Boie
17282578a9 arc: fix update of ERET on exc return
This code path for returning from an exception wasn't
updating ERET with ESF->pc, resulting in any updates to
the PC by the fault handler being ignored.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-07-20 14:13:09 -04:00
Wayne Ren
97d0436486 arch: arc: use top of isr stack as exception stack and bug fixes
* re-use top of isr stack as exception stack
* bug fixes in irq offload's implementation
* improve kernel oops implementation

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-06-11 09:05:15 -05:00
Wayne Ren
5b6f860539 arch: arc: use a separate stack for exception handling
* use a separate stack for exception handling, this
will gurantee the exception handling always work, not
affected by some speical cases, e.g., stack check exception
or mem. protection exception at the exception entry.

* this commit can fix the second case of #8092

* note: the thread switch is still possible in exception
handling, e.g, caused by thread_abort. But the switched out
thread cannot be recovered, as the thread context is not
setup.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-06-08 16:37:22 -05:00
Wayne Ren
876a9af9d5 arch: arc: fix the bug in register clear for USER_SPACE
* blink, fp should not be always cleared
* clean up code format
* use a better way to save and restore ER_SEC_STAT

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-25 15:56:15 +02:00
Wayne Ren
77eb883ab0 arch: arc: fix the bug in exception return for secure mode
* current codes use a faked interrupt return to do a thread switch
  in exception return.
* so the different between exception return and interrupt return
  should be carefully considered.
* when secure is enabled, the sec_stat should also be pushed in
  exception entry.
* when secure is enabled, SEC_STAT.IRM must be configured corrrectly
  for interrupt return.
* For the case of faked interrupt return in exception return, the
  correct value of SEC_STAT.IRM comes from ER_SEC_STAT.ERM.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-25 15:56:15 +02:00
Wayne Ren
6c65ac2bb4 arch: arc: fix the typo of label which caused issue #7249
* fix the issue #7249 which is caused by a typo of label

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-05-02 09:31:00 -04:00
Wayne Ren
3d9ba10b5c arch: arc: bug fixes and optimization in exception handling
The original exception handling has space to optimize and
and some bugs need to be fixed.

* define NANO_ESF
   * add the definition of NANO_ESF which is an irq_stack_frame
   * add the corresponding codes in exception entry and handler
   * remove _default_esf
* implement the _ARCH_EXCEPT
   * use trap exception to raise exception by kernel
   * add corresponding trap exception entry
   * add _do_kernel_oops to handle the exception raised by
     _ARCH_EXCEPT.
* add the thread context switch in exception return
   * case: kernel oops may raise thread context switch
   * case: some tests will re-implement SysFatalHandler to raise
     thread context switch.
   * as the exception and isr are handled in kernel isr stack, so
     the thread context switch must be in the return of exception/isr
     , and the exception handler must return, should not be decorated
     with FUNC_NORETURN
* for arc, _is_in_isr should consider the case of exception

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-04-17 10:50:12 -07:00
Wayne Ren
e445ab6f21 arch: arc: handle exception in privilege task when USERSPACE enabled
when USERSPACE is enabled, exception is handled in the privilege
stack of thread. This make thread context switch is possible in the
exception handler. For some case,e.g. tests, this is useful.

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
f81dee0b2b arch: arc: add user space support for arc
* add the implementation of syscall
  * based on 'trap_s' intruction, id = 3
* add the privilege stack
  * the privilege stack is allocted with thread stack
  * for the kernel thread, the privilege stack is also a
    part of thread stack, the start of stack can be configured
    as stack guard
  * for the user thread, no stack guard, when the user stack is
    overflow, it will fall into kernel memory area which requires
    kernel privilege, privilege violation will be raised
* modify the linker template and add MPU_ADDR_ALIGN
* add user space corresponding codes in mpu
* the user sp aux reg will be part of thread context
* When user thread is interruptted for the 1st time, the context is
  saved in user stack (U bit of IRQ_CTLR is set to 1). When nest
  interrupt comes, the context is saved in thread's privilege stack
* the arc_mpu_regions.c is moved to board folder, as it's board
  specific
* the above codes have been tested through tests/kernel/mem_protect/
  userspace for MPU version 2

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
2018-02-16 12:20:16 +01:00
Wayne Ren
f8d061faf7 arch: arc: add nested interrupt support
* add nested interrupt support for interrupts
   + use a varibale exc_nest_count to trace nest interrupt and exception
   + regular interrupts can be nested by regular interrupts and fast
interrupts
   + fast interrupt's priority is the highest, cannot be nested
* remove the firq stack and exception stack
   + remove the coressponding kconfig option
   + all interrupts (normal and fast) and exceptions will be handled
     in the same stack (_interrupt stack)
   + the pros are, smaller memory footprint (no firq stack), simpler
     stack management, simpler codes, etc.. The cons are, possible
     10-15 instructions overhead for the case where fast irq nests
     regular irq
* add the case of ARC in test/kernel/gen_isr_table

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-08-10 12:47:15 -04:00
Anas Nashif
397d29db42 linker: move all linker headers to include/linker
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-18 09:24:04 -05:00
Michael R Rosen
b5d4a25a11 arc: fix balign position to properly 4byte align global vars
The .balign directives were not working correctly in their
previous positions as the directive was applying to the section
before the variable's section, causing in some builds the
variables to be misaligned, and accesses to them causing faults.
With the alignments after the section declaration, the variables
will now be aligned as specified. Any future variable declarations
should use this form instead to ensure proper alignment.

Signed-off-by: Michael R Rosen <michael.r.rosen@intel.com>
2017-06-12 23:33:31 -04:00
Benjamin Walsh
ee659ae1a1 build: add _ASMLANGUAGE to all asm files
This avoids asm files from having to explicitly define the _ASMLANGUAGE
symbol themselves.

Change-Id: I71f5a169f75d7443a58a0365a41c55b20dae3029
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-01-24 13:34:51 +00:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Benjamin Walsh
3c39e55ab1 arc: fix unaligned variables resulting in unaligned k_cpu_sleep_mode
Force-align all variables defined via asm .word to ensure 4-byte
alignment.

The straddled_tick_on_idle_enter variable was a bool, which resolved in
an one-byte quantity. Changing it to a 32-bit integer. It would have
occupied 4 bytes anyway with alignment.

Fixes ZEP-1549.

Change-Id: If5e0aa1a75dbc73d896b44616f059d221fe191c6
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2017-01-13 01:36:08 +00:00
Benjamin Walsh
168695c7ef kernel/arch: inspect prio/sched_locked together for preemptibility
These two fields in the thread structure control the preemptibility of a
thread.

sched_locked is decremented when the scheduler gets locked, which means
that the scheduler is locked for values 0xff to 0x01, since it can be
locked recursively. A thread is coop if its priority is negative, thus
if the prio field value is 0x80 to 0xff when looked at as an unsigned
value.

By putting them end-to-end, this means that a thread is non-preemptible
if the bundled value is greater than or equal to 0x0080. This is the
only thing the interrupt exit code has to check to decide to try a
reschedule or not.

Change-Id: I902d36c14859d0d7a951a6aa1bea164613821aca
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2017-01-09 20:52:25 +00:00
Benjamin Walsh
f955476559 kernel/arch: optimize memory use of some thread fields
Some thread fields were 32-bit wide, when they are not even close to
using that full range of values. They are instead changed to 8-bit fields.

- prio can fit in one byte, limiting the priorities range to -128 to 127

- recursive scheduler locking can be limited to 255; a rollover results
  most probably from a logic error

- flags are split into execution flags and thread states; 8 bits is
  enough for each of them currently, with at worst two states and four
  flags to spare (on x86, on other archs, there are six flags to spare)

Doing this saves 8 bytes per stack. It also sets up an incoming
enhancement when checking if the current thread is preemptible on
interrupt exit.

Change-Id: Ieb5321a5b99f99173b0605dd4a193c3bc7ddabf4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2017-01-09 20:52:24 +00:00
Benjamin Walsh
e6a69cae54 kernel/arch: reverse polarity on sched_locked
This will allow for an enhancement when checking if the thread is
preemptible when exiting an interrupt.

Change-Id: If93ccd1916eacb5e02a4d15b259fb74f9800d6f4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2017-01-06 17:32:24 +00:00
Benjamin Walsh
88b3691415 kernel/arch: enhance the "ready thread" cache
The way the ready thread cache was implemented caused it to not always
be "hot", i.e. there could be some misses, which happened when the
cached thread was taken out of the ready queue. When that happened, it
was not replaced immediately, since doing so could mean that the
replacement might not run because the flow could be interrupted and
another thread could take its place. This was the more conservative
approach that insured that moving a thread to the cache would never be
wasted.

However, this caused two problems:

1. The cache could not be refilled until another thread context-switched
in, since there was no thread in the cache to compare priorities
against.

2. Interrupt exit code would always have to call into C to find what
thread to run when the current thread was not coop and did not have the
scheduler locked. Furthermore, it was possible for this code path to
encounter a cold cache and then it had to find out what thread to run
the long way.

To fix this, filling the cache is now more aggressive, i.e. the next
thread to put in the cache is found even in the case the current cached
thread is context-switched out. This ensures the interrupt exit code is
much faster on the slow path. In addition, since finding the next thread
to run is now always "get it from the cache", which is a simple fetch
from memory (_kernel.ready_q.cache), there is no need to call the more
complex C code.

On the ARM FRDM K64F board, this improvement is seen:

Before:

1- Measure time to switch from ISR back to interrupted task

   switching time is 215 tcs = 1791 nsec

2- Measure time from ISR to executing a different task (rescheduled)

   switch time is 315 tcs = 2625 nsec

After:

1- Measure time to switch from ISR back to interrupted task

   switching time is 130 tcs = 1083 nsec

2- Measure time from ISR to executing a different task (rescheduled)

   switch time is 225 tcs = 1875 nsec

These are the most dramatic improvements, but most of the numbers
generated by the latency_measure test are improved.

Fixes ZEP-1401.

Change-Id: I2eaac147048b1ec71a93bd0a285e743a39533973
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-12-15 15:50:02 -05:00
Julien Delayen
176d184fb8 power: Add ARC core suspend and resume support
When going into DEEP_SLEEP mode, the ARC core now saves
its context. This includes:
- All core registers
- Stack pointer
- Program counter (restored by jumping to the restore code)

The arc reset code now checks if the GPS0 bit 2 is set.
This is similar to the behavior of the x86 core done by
the QMSI bootloader which is setting GPS0 bit 1 in order
to call the restore path instead of cold boot path.

The sample has been adapted in order to support the ARC.

Jira: ZEP-1222

Change-Id: I375f03b16b8a5fd1f07ead55cf7e4947d6290c9f
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
2016-12-15 12:49:33 +00:00
Benjamin Walsh
f6ca7de09c kernel/arch: consolidate tTCS and TNANO definitions
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.

Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.

The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.

The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.

Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.

Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-12 07:04:52 -05:00
Chuck Jordan
73c5b2861e arc: trap handler should always check IRQ_ACT
Regardless of the number of interrupt priorities
supported, the exit of the trap handler can check
AUX_IRQ_ACT to see if it interrupted a FIRQ or IRQ.

Change-Id: I0b84d8298d3e6e437c934c01db4535fa8fe29458
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-11-11 21:37:18 +00:00
Andrew Boie
8871cf0994 arc: remove support for legacy kernels
Change-Id: Id3d8285dc39428752758ee47fb1b826f05b1f3e0
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-04 11:45:14 -07:00
Dmitriy Korovkin
909bfffda9 unified/arc: add unified kernel support for ARC arch
- the interrupt (both regular and fast) now does not do rescheduling
  if the current thread is a coop thread or if the scheduler is not locked

- the _nanokernel.flags cache of _current.flags is not used anymore
  (could be a source of bugs) and is not needed in the scheduling algo

- there is no 'task' field in the _nanokernel anymore: scheduling routines
  call _get_next_ready_thread instead

- the _nanokernel.fiber field is replaced by a more sophisticated
  ready_q, based on the microkernel's priority-bitmap-based one

- thread initialization initializes new fields in the tcs, and does not
  initialize obsolete ones

- nano_private includes nano_internal.h from the unified directory

- The FIBER, TASK and PREEMPTIBLE flags do not exist anymore: the thread
  priority drives the behaviour

- the tcs uses a dlist for queuing in both ready and wait queues instead
  of a custom singly-linked list

- other new fields in the tcs include a schedule-lock count, a
  back-pointer to init data (when the task is static) and a pointer to
  swap data, needed when a thread pending on _Swap() must be passed more
  then just one value (e.g. k_stack_pop() needs an error code and data)

- the 'fiber' and 'task' fields of _nanokernel are replaced with an O(1)
  ready queue (taken from the microkernel)

- fiberRtnValueSet() is aliased to _set_thread_return_value since it
  also operates on preempt threads now

- _set_thread_return_value_with_data() sets the swap_data field in
  addition to a return value from _Swap()

- convenience aliases are created for shorter names:

  - _current is defined as _nanokernel.current
  - _ready_q is defined as _nanokernel.ready_q

- _Swap() sets the threads's return code to -EAGAIN before swapping out
  to prevent timeouts to have to set it (solves hard issues in some
  kernel objects).

Change-Id: Ib9690173cbc36c36a9ec67e65590b40d758673de
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-10-22 01:27:00 +00:00