There shall be no special case for inverted PWM pulse when checking
if the captured value is correct.
The output signal inversion is done in HW (at least for stm32h7xx)
SoC. The measured value of the pulse shall be the same - no matter
if we invert the signal or not (as measuring also takes into account
the inversion of the output/input signal).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Without this change the information about PWM polarity is lost when
flags are passed, as the out.flags is set according to PWM description
in the DTS.
For example in: pwms = <&pwm2 2 0 PWM_POLARITY_NORMAL> the out.flags
is always set to PWM_POLARITY_NORMAL.
However, some tests - like 'test_pulse_capture_inverted' require testing
if PWM driver is able to invert the generated signal.
After this change, the generated waveform (from the TIMx pin) is
inverted.
Tested on: Nucleo 'nucleo_h743zi' board (TIM2 ch2 -> out, TIM5 ch1 <- in)
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit allows testing the PWM (timers) on the
nucleo_h743zi development board.
The HW setup for testing:
Timer2 (channel 2) as PWM signal generator -> CN11 connector
(PIN 30)
Timer5 (channel1) in Capture mode to measure the pulse
duration -> CN11 connector (PIN28)
Such setup allows easy HW loopback connection (just short cut two
consecutive pins/soldering vias on the devel board's PCB).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Refactor the mcp230xx driver to generically also support
SPI IO expanders, renaming it to mcp23xxx in the process.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
DMA controller is enabled and tested for cortex M7 core. The M7 core was
tested on the loop and channel link transfer tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
DMA controller is enabled and tested for cortex M7 core. The M7 core was
tested on the loop and channel link transfer tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Test verifies that i2c pmic regulator can be disabled or enabled using
the regulator API. Verifies PMIC output voltage using ADC.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit reworks the CMOS test to a generic seconds
counter test.
And it adds a test case for the iMX RT1064 SNVS RTC.
Tested with mimxrt1064_evk
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add support for LPSPI DMA mode on RT1064, RT1060, RT1050, RT1024,
RT1020, RT1015, and RT1010 evaluation boards. Update tests to match.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add a unit test that allows to validate if pin control configuration
stored in Devicetree is parsed correctly.
nRF boards used to run this test should add the pinctrl:nrf tag.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add the pinctrl state name (default) for the PWM peripherals.
Changes performed based on the script proposed in
"boards: arm: stm32: add pinctrl state name for UART peripheral"
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add the pinctrl state name (default) for the UART/USART/LPUART
peripherals. Changes performed using the following Python script run
from the repository root:
```
from pathlib import Path
import re
for fpath in Path(".").glob("boards/arm/**/*.dts"):
lines = open(fpath).readlines()
is_stm32 = False
for line in lines:
if "stm32" in line:
is_stm32 = True
break
if not is_stm32:
continue
with open(fpath, "w") as f:
for line in lines:
f.write(line)
m = re.match(r"(\s+)pinctrl-0.*us?art.*", line)
if m:
f.write(m.group(1) + "pinctrl-names = \"default\";\n")
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The qemu arm64 virt machine PCIe controller config space needs a
64bit adressing, so switch the entire qemu-virt-a53 and
qemu_cortex_a53 board dts to address-cells & size-cells to 2
to accommodate for 64bit addresses.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Since drivers implement a callback based on action and not the state,
we should be using the API based on the action instead of the one based
on the state.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add overlay file for disco_l475_iot1 board to pwm_loopback test.
The file is based on the existing overlays for twr_ke18f and frdm_k64f.
The new configuration uses both a 16-Bit timer with active prescaler
as well as a 32-Bit timer with deactivated prescaler for coverage.
It is assumed that other STM32 boards will behave like the
disco_l475_iot1. Only this board was available for testing.
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
Remove option CONFIG_USB_UART_CONSOLE where it has no influence
or enable CONFIG_SHELL_BACKEND_SERIAL_CHECK_DTR without taking
a detour through CONFIG_USB_UART_CONSOLE.
Check the compatibility of chosen property instead
of usage of CONFIG_USB_UART_CONSOLE option.
Align how to wait for the readiness of CDC ACM UART.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
drivers.flash.nrf_qspi_nor and drivers.flash.soc_flash_nrf:
keep nrf52840dk_nrf52840 as integration_platform
drivers.flash.default:
Use mimxrt1060_evk instead as integration_platform,
this is the only platform allowed.
drivers.flash.stm32:
Add a bunch of boards as integration_platforms for
this test configuration.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Add support of the tests/drivers/spi/spi_loopabck
with dma (V1).
Connect MISO pin (D12) to MOSI (D11) pin on the board
to pass the test.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch is defining Tx buffers in NON CACHE memory for using
with DMA transfers. This requires the CONFIG_NOCACHE_MEMORY=y
flag when mcu is using CACHE.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This PR configures the test case to run the adc_api on the
b_u585i_iot02a disco board from STMicroelectonics.
Channel 15 is choosen
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove the DT_CHOSEN_ZEPHYR_CANBUS_LABEL macro and replace it with
DEVICE_DT_GET(DT_CHOSEN(zephyr_canbus)) were possible.
Where both devicetree CAN controllers and Kconfig specified CAN loopback
controllers are supported, the macro is replaced with
DT_LABEL(DT_CHOSEN(zephyr_canbus)) for now.
This is the first pass for removing the requirement for devicetree
labels for CAN controllers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the Zephyr chosen property for specifying the default CAN bus
controller from "zephyr,can-primary" to "zephyr,canbus".
The "zephyr,can-primary" property name was selected in antipation of
adding support for redundant CAN networks, which we have yet to
add. Meanwhile, the "primary" term causes confusion for non-redundant
CAN bus configurations (and the "can" term doesn't match the name of the
Zephyr CAN bus subsystem).
The CAN in Automation (CiA) 302-6, which deals with CANopen network
redundancy, uses the terms "default interface" and "redundant
interface". If/when we add support for redundant CAN networks, the
"zephyr,canbus" chosen property can be supplemented with a
"zephyr,canbus-redundant" chosen property.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Refactors all of the EEPROM drivers to use a shared driver class
initialization priority configuration, CONFIG_EEPROM_INIT_PRIORITY, to
allow configuring EEPROM drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are at2x and emul drivers which have dependencies on SPI,
I2C, or flash drivers and must therefore initialize later than the
default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds a new zassert to check whether PWM capture has previously been
enabled and correctly returns -EBUSY on a second call.
While working on #39694 this was found to be a missing test case.
The new test case has been verified against the suggested changes of
that PR.
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
Enable watchdog timer on RT1160 evk. This was tested using
the watchdog timer api test (tests/drivers/watchdog/wdt_basic_api)
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add get_config function to I2C emulator.
Also update tests using I2C emulator to use i2c_get_config.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Convert remaining tests and samples to using find_package() instead of
literally including the CMake boilerplate code.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The BT6x0 board configuration is only valid for the BT610 device,
therefore rename the boards file to BT610
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Enables ADC1 on the RT1020 evaluation board. Channels 10 and 11 of this
ADC are exposed as pins 1 and 2 of J18 on the evk.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enables ADC on RT1015 evaluation board. Channels 1 and 13 are exposed as
pins 2 and 1 of J18 on the EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added ADC support to RT1010 evaluation board. ADC channels 1 and 2 are
exposed as pins 10 and 12 of J26.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adds ADC support to RT1024 EVK. ADC channels 10 and 11 are enabled as
pins 2 and 4 on J18 of the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enables the ADC on the RT1060 evaluation board. Channels 0 and 15 of
ADC1 are available on pins 1 and 0 of J23, respectively.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds const modifier in second argument for
sensor trigger handler.
There is no reason to modify this data and this change
would allow to store trigger configuration also in FLASH.
Fixes: #38929
Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
Moves DAC driver configuration defaults from the application level to
the board level for the bl5340_dvk board.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Moves DAC dts node and driver configuration defaults from the
application level to the board level for the bl654_dvk board.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Moves DAC dts node and driver configuration defaults from the
application level to the board level for the bl653_dvk board.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Moves DAC dts node and driver configuration defaults from the
application level to the board level for the bl652_dvk board.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds another test configuration to ensure we build sensor drivers with
device power management enabled, in addition to the existing test that
builds sensor drivers with device power management disabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
