Commit Graph

104 Commits

Author SHA1 Message Date
Ioannis Glaropoulos
b3b36f69a6 arm: cortex-m: shrink hidden option for null-pointer detection
Shrink the name of the hidden cortex-m option for the
null-pointer dereference detection feature.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-26 12:30:05 -05:00
Ioannis Glaropoulos
c5b4094cfb modules: tf-m: do not expose TF-M NS interface include directories publicly
Instead of exposing publicly the TF-M NS interface include
directories, we include them when we build relevant projects.
This is required, as the TF-M include directories contains
psa crypto sources that are also provided by the mbedtls
crypto module. The downside of this solution is that the
TF-M includes need to be added explicitly in each application
that uses TF-M APIs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-09 09:59:22 -05:00
Krzysztof Chruscinski
22ae43f0a6 tests: arch: arm: arm_no_multithreading: Add physical platforms
Add 2 nordic boards on which no multithreading test is
passing.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-05-07 14:40:27 +02:00
Ioannis Glaropoulos
89ec3d82ad tests: arm_thread_swap_tz: add tfm tag
Add the tfm tag to the arm_thread_swap_tz test,
since the test is running with TF-M by default.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-06 22:17:35 +02:00
Ioannis Glaropoulos
0eb3b3c2c0 tests: arm_thread_swap_tz: correct dt overlays for stm32 boards
Correct thee dt overlays for the STM32 boards, so the Zephyr
image starting address is in accordance with what TF-m expects
it to be.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-05 13:00:31 +02:00
Ioannis Glaropoulos
b7c964da48 tests: arm_thread_swap_tz: decrease work delay to ensure test passing
Decrease the submitted work delay, to ensure that the PSA
crypto operation will be preempted when the work fires. The
modification is required for devices with fast crypto
operations. Also minor corrections to the test ase name,
so it is not the same with the other arm_thread_swap test.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-05 13:00:31 +02:00
Øyvind Rønningstad
17442cece9 tests: arm: Add arm_thread_swap_tz test
For testing secure->non-secure thread swapping.
This also tests that the FP context is correctly preserved
when calling a secure function.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2021-05-05 13:00:31 +02:00
Øyvind Rønningstad
a2cfb8431d arch: arm: Add code for swapping threads between secure and non-secure
This adds code to swap_helper.S which does special handling of LR when
the interrupt came from secure. The LR value is stored to memory, and
put back into LR when swapping back to the relevant thread.

Also, add special handling of FP state when switching from secure to
non-secure, since we don't know whether the original non-secure thread
(which called a secure service) was using FP registers, so we always
store them, just in case.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2021-05-05 13:00:31 +02:00
Krzysztof Chruscinski
d34a289503 tests: arch: arm: no_multithreading: Limit platforms allowed
When multithreading is off, kernel source files like sem.c (samphore
implementation) are not present in the build. Some platforms by default
fetch modules or drivers that are using multithreading primitives and
because of that fails to compile when multithreading is off.

Limit the test to only qemu platforms since test is arch specific.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-05-04 21:15:36 +02:00
Ioannis Glaropoulos
12025e2620 tests: arm_interrupt: exend test case for FPU SHARING
Extend the stress test of stacking error, to cover
the case of an active FP context.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-04 16:47:48 +02:00
Gerard Marull-Paretas
f163bdb280 power: move reboot functionality to os lib
Reboot functionality has nothing to do with PM, so move it out to the
subsys/os folder.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-04-28 20:34:00 -04:00
Ioannis Glaropoulos
13cde704e9 tests: arm_no_multithreading: confirm IRQ index being non-negative
Check that the index returned by the function that looks
for an available IRQ line is non-negative, and do not just
rely on catching this with an ASSERT. That suppresses a
Coverity out-of-bounds warning.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-04-15 15:10:51 -05:00
Krzysztof Chruscinski
8bee027ec4 arch: arm: Unconditionally compile IRQ_ZERO_LATENCY flag
Flag was present only when ZLI was enabled. That resulted in additional
ifdefs needed whenever code supports ZLI and non-ZLI mode.

Removed ifdefs, added build assert to irq connections to fail at
compile time if IRQ_ZERO_LATENCY is set but ZLI is disabled. Additional
clean up made which resulted from removing the ifdef.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-04-12 07:33:27 -04:00
James Harris
b10428163a kernel: sem: add K_SEM_MAX_LIMIT
Currently there is no way to distinguish between a caller
explicitly asking for a semaphore with a limit that
happens to be `UINT_MAX` and a semaphore that just
has a limit "as large as possible".

Add `K_SEM_MAX_LIMIT`, currently defined to `UINT_MAX`, and akin
to `K_FOREVER` versus just passing some very large wait time.

In addition, the `k_sem_*` APIs were type-confused, where
the internal data structure was `uint32_t`, but the APIs took
and returned `unsigned int`. This changes the underlying data
structure to also use `unsigned int`, as changing the APIs
would be a (potentially) breaking change.

These changes are backwards-compatible, but it is strongly suggested
to take a quick scan for `k_sem_init` and `K_SEM_DEFINE` calls with
`UINT_MAX` (or `UINT32_MAX`) and replace them with `K_SEM_MAX_LIMIT`
where appropriate.

Signed-off-by: James Harris <james.harris@intel.com>
2021-03-05 08:13:53 -06:00
Ioannis Glaropoulos
8e5e719b17 tests: arm: increase idle thread stack size for no-opt test-cases
In the arch/arm test suite there are tests running with
CONFIG_NO_OPTIMIZATIONS enabled, and may require a
larger idle thread stack size.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-05 15:03:24 +03:00
Ioannis Glaropoulos
407c76d54f tests: arm thread swap: save and restore callee-saved in subroutine
Temporarily save and restore all callee-saved registers
in the sub-routine, not only the frame pointer, to avoid
errors if compiler chooses to use them in the alternative
thread function. The callee-saved regs are restored after
the alternative thread switches back in.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-05 15:03:24 +03:00
Ioannis Glaropoulos
6a001457d9 tests: arm_interrupt: add test-case for null pointer detection feature
Add a test case for the null pointer dereferencing detection
feature in Cortex-M. The test case is added in arm_interrupt
test suite and the README file is updated accordingly.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-03 10:38:29 +01:00
Anas Nashif
0677c7615f tests: arm_thread_swap: fix testsuite setup
Do not declare 2 testsuite, use skip function for test not supported
with userspace instead.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-02-22 14:36:06 -05:00
Ioannis Glaropoulos
ab1600de00 tests: arch: arm: move arm_psci to arm64 directory
arm_psci test suite is specific to ARM64, while
all other test suites in tests/arch/arm directory
are supported in Cortex-M architecture only. We
move arm_psci to arm64 directory, effectively,
separating tests suites for AARCH32 and AARCH64.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-19 05:27:31 -06:00
Alexandre Bourdiol
a276603c2d test: arch: arm: arm_interrupt: clear FPSCR register in ISR
Clear Floating Point Status and Control Register (FPSCR),
to prevent from having the interrupt line set to pending again,
in case FPU IRQ is selected by the test as "Available IRQ line"

Fixes #31982

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2021-02-14 16:37:49 -05:00
Ioannis Glaropoulos
fb2b77c995 tests: arm: cortex_m: test dynamic lazy stacking on Cortex-m
Test the dynamic lazy stacking activation on Cortex-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-02 17:58:58 -05:00
Carlo Caione
9efc7b661e tests: psci: Introduce PSCI test
Add a simple test to the the PSCI driver

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-18 19:06:53 +01:00
Ioannis Glaropoulos
3b89cf173b arch: arm: cortex-m: enable IRQs before main() in single-thread mode
Enable interrupts before switching to main()
in cortex-m builds with single-thread mode
(CONFIG_MULTITHREADING=n).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-29 10:47:43 +02:00
Alexandre Bourdiol
d800bdfa7d tests: arch: arm: arm_thread_swap: use memset() instead of memcpy()
According to comment memset() should be used instead of memcpy().
There is no need to access to address 0x0.
Fixes #28691

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-09-28 12:01:14 +02:00
Ioannis Glaropoulos
85af1bd599 tests: arch: arm: do not build/run test suites for _ns boards
Some test suites depend on determining at run-time
an available IRQ line which can then be used to execute
the test suite. This logic cannot used if the available
IRQ line is not targeting the current security state.
Therefore, filter out the _ns Cortex-m boards from
running these tests suites (i.e. when building with
CONFIG_TRUSTED_EXECUTION_NONSECURE=y) since we can not
contol the target state of the NVIC interrupt lines.

These tests suites test generic ARM features, that do
not depend on TrustZone-M configuration, so it is OK
that they are only executed on ARM platforms without
the NONSECURE configration set.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-15 18:04:11 -05:00
Ioannis Glaropoulos
f4d6a7f7ac tests: arch: arm: rework test suite configuration
This commit reworks the .yaml files in Cortex-M
test suites, by grouping the common configuration
under the common: section. This considerably cleans
up the test suite configuration.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-15 18:04:11 -05:00
Ioannis Glaropoulos
c6cf8d1673 tests: arm: interrupt: fix side effect in assertion
Read a volatile status into a local variable to
discard a side effect in assertion. This fixes
an issue reported by Coverity: CID: 214210.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-09 09:58:16 -04:00
Maksim Masalski
fd15524912 tests: arch: arm mem protection check CPU scrubs regs after syscall
To improve Zephyr security, I decided to create a test
test_after_syscall_cpu_scrubs_regs
I think necessary to check upon exit of a system call back
to the calling thread, the kernel scrubs CPU registers for sensitive
data.

Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
2020-09-05 11:53:39 +02:00
Øyvind Rønningstad
c00f33dcb0 arch: arm: cortex_m: Add tz_ns.h
Provide a TZ_SAFE_ENTRY_FUNC() macro for wrapping non-secure entry
functions in calls to k_sched_lock()/k_sched_unlock()

Provide a __TZ_WRAP_FUNC() macro which helps in creating a function
that "wraps" another in a preface and postface function call.

	int foo(char *arg); // Implemented somewhere else.
	int __attribute__((naked)) foo_wrapped(char *arg)
	{
		WRAP_FUNC(bar, foo, baz);
	}

is equivalent to

	int foo(char *arg); // Implemented somewhere else.
	int foo_wrapped(char *arg)
	{
		bar();
		int res = foo(arg);
		baz();
		return res;
	}

This commit also adds tests for __TZ_WRAP_FUNC().

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-09-04 11:58:41 +02:00
Andrzej Głąbek
30908a91ce tests: arm_irq_vector_table: Correct the name of nRF clock IRQ handler
It should be nrfx_power_clock_irq_handler, not nrfx_clock_irq_handler.
The latter is only present as a function if both nrfx CLOCK and POWER
drivers are used and it is then called from the actual IRQ handler,
which is always named nrfx_power_clock_irq_handler (also when only
the nrfx CLOCK driver is used as in case of this test).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-09-03 21:52:52 +02:00
Henrik Brix Andersen
73288835ec tests: arch: arm: irq_advanced_features: remove Arty Cortex-M1 handling
Remove special handling of the ARM Cortex-M1 DesignStart FPGA reference
design running on the Digilent Arty after CONFIG_NUM_IRQS was reduced
from 8 to 7.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Henrik Brix Andersen
db6737b34a tests: arch: arm: irq_advanced_features: check irq is not always pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-09-02 15:02:03 +02:00
Ioannis Glaropoulos
acfb66b6f4 tests: arch: arm: add test for IRQ Target state management
We add a simple test-case for verifying the behavior of the
Cortex-M IRQ target state management. We add an additional
test only for TrustZone-enabled Cortex-M targets running
in Secure mode. We explicitly exclude ARMv8-M platforms that
enable Non-Secure FW build by default from running the test.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-09-02 15:01:30 +02:00
Tomasz Bursztyka
50edd19f3a tests: Apply dynamic IRQ API change
Switching to constant parameter.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Krzysztof Chruscinski
d8da2e59c8 drivers: clock_control: nrf: Make use of related nrfx drivers
Update the driver implementation to use nrfx_clock and nrfx_power
drivers. Update also revisions of the hal_nordic and nrf_hw_models
modules, so that it is actually possible to use those drivers.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-08-31 12:40:47 +02:00
Chris Coleman
99a268fa16 arch: arm: Collect full register state in Cortex-M Exception Stack Frame
To debug hard-to-reproduce faults/panics, it's helpful to get the full
register state at the time a fault occurred. This enables recovering
full backtraces and the state of local variables at the time of a
crash.

This PR introduces a new Kconfig option, CONFIG_EXTRA_EXCEPTION_INFO,
to facilitate this use case. The option enables the capturing of the
callee-saved register state (r4-r11 & exc_return) during a fault. The
info is forwarded to `k_sys_fatal_error_handler` in the z_arch_esf_t
parameter. From there, the data can be saved for post-mortem analysis.

To test the functionality a new unit test was added to
tests/arch/arm_interrupt which verifies the register contents passed
in the argument match the state leading up to a crash.

Signed-off-by: Chris Coleman <chris@memfault.com>
2020-08-31 10:13:27 +02:00
Anas Nashif
dca317c730 sanitycheck: inclusive language
change whitelist -> allow.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-08-27 07:04:07 -04:00
Henrik Brix Andersen
80a3c8c763 tests: arch: arm: irq_advanced_features: add support for Arty Cortex-M1
Add support for the Cortex-M1 ARM DesignStart FPGA reference design
running on the Digilent Arty development board.

This board uses IRQ 7 (the last IRQ) as a level-detect non-interrupt
signal to determine whether the V2C-DAPLINK shield is installed. This
IRQ line is always pending when the shield is not installed. Use IRQ 6
instead.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
7c2ef1b3c8 tests: arch: arm: ramfunc: add support for the Arty Cortex-M1 board
The Data Tightly Coupled Memory (DTCM) of the Cortex-M1 present in the
Cortex-M1 ARM DesignStart FPGA implementation is No-Execute (NX), so
__ramfunc linked in the DTCM will cause a hard fault when executed.

Use the Xilinx Block RAM (bram0) present in the reference design for
demonstrating __ramfunc instead.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
7675c4ff50 tests: arch: arm: no_multithreading: check that irq is not always pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Henrik Brix Andersen
6984f15d46 tests: arch: arm: interrupt: check that irq is not always pending
Extend check to determine a usable ARM NVIC IRQ line to verify that the
IRQ line is not always pending.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-08-14 13:35:39 -05:00
Greg Leach
e44f04d4f9 boards: Add BT510 support
Add support for the Laird Connectivity BT510 sensor

Signed-off-by: Greg Leach <greg.leach@lairdconnect.com>
2020-08-14 12:58:03 -05:00
Ioannis Glaropoulos
13cdeeedc0 tests: arch: arm: add a test for no-multithreading case for Cortex-m
Add a test that verifies basic ARCH-level functionality
when building Zephyr without support for multithreading.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-08-07 13:06:04 +02:00
Andrew Boie
79728eccca toolchain: add Z_POW2_CEIL()
Helper macro for rounding up to next power of two.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-07-30 21:11:14 -04:00
Ioannis Glaropoulos
445d006a5e tests: arch: arm: add a test for the SW Vector Relaying feature
Add a test suite to validate the Software Vector Relaying
feature for Cortex-M architecture.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-27 13:23:36 +02:00
Stephanos Ioannidis
9cf4cab53d soc: arm: Fix header inclusion from deprecated paths
This commit fixes Cortex-M header inclusions from the deprecated paths.

The Cortex-M headers were relocated from `include/arch/arm/cortex_m` to
`include/arch/arm/aarch32/cortex_m` by the refactoring done in the
commit d048faacf2.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-06-09 10:38:36 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Marc Herbert
debade9121 tests: make find_package(Zephyr...) REQUIRED
... because it is (required).

This makes a difference when building with CMake and forgetting
ZEPHYR_BASE or not registering Zephyr in the CMake package registry.

In this particular case, REQUIRED turns this harmless looking log
statement:

-- Could NOT find Zephyr (missing: Zephyr_DIR)
-- The C compiler identification is GNU 9.3.0
-- The CXX compiler identification is GNU 9.3.0
-- Check for working C compiler: /usr/bin/cc
-- ...
-- ...
-- ...
-- Detecting CXX compile features
-- Detecting CXX compile features - done
CMake Error at CMakeLists.txt:8 (target_sources):
  Cannot specify sources for target "app" which is not built by
  this project.

... into this louder, clearer, faster and (last but not least) final
error:

CMake Error at CMakeLists.txt:5 (find_package):
  Could not find a package configuration file provided by "Zephyr" with
  any of the following names:

    ZephyrConfig.cmake
    zephyr-config.cmake

  Add the installation prefix of "Zephyr" to CMAKE_PREFIX_PATH or set
  "Zephyr_DIR" to a directory containing one of the above files.  If
  "Zephyr" provides a separate development package or SDK, be sure it
  has been installed.

-- Configuring incomplete, errors occurred!

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2020-05-29 10:47:25 +02:00
Ioannis Glaropoulos
b273803537 tests: arch: arm_interrupt: minor style fixes in comments/README
Add some missed style fixes in inline comments and test README.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-05-27 11:57:55 +02:00
Ioannis Glaropoulos
dbea2b757a tests: arm: arm_interrupt: improve sample console output
Enhance the sample console output of the arm_interrupt
test, to reflect recent changes in test context as well
as kernel fault handling log output format.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-05-27 10:10:22 +02:00