Commit Graph

302 Commits

Author SHA1 Message Date
Daniel Leung
a06d54c65a kernel: remove C syscall include in builtin atomic header
The builtin atomic header file should not include the syscall
header that is generated from C version of atomic functions.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-04-02 07:23:33 -04:00
Anas Nashif
25c87db860 kernel/arch: cleanup function definitions
make identifiers used in the declaration and definition identical. This
is based on MISRA rule 8.3.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-04-01 05:34:17 -04:00
Krzysztof Chruscinski
6ce2fe061a lib: os: cbprintf: Fix legth field in static package
Byte value was written instead of word.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-29 14:08:41 +02:00
Krzysztof Chruscinski
65474d8d67 lib: os: cbprintf: Improvements for sparc
Unified define used for handling sparc case in static and
runtime packaging. Reworked macro for storing argument in
static packaging.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-29 14:08:41 +02:00
Krzysztof Chruscinski
c26e08a51f lib: os: cbprintf: Add alignment offset to packaging
Added parameter to CBPRINTF_STATIC_PACKAGE which indicates buffer
alignment offset compared to CBPRINTF_PACKAGE_ALIGNMENT. When offset
is set to 0, macro assumes that input buffer is aligned to
CBPRINTF_PACKAGE_ALIGNMENT. When offset is positive, macro assumes
that buffer address is shifted by given number of bytes to
CBPRINTF_PACKAGE_ALIGNMENT alignment.

Extended cbprintf_package to use len argument as alignment offset
indicator when calculating length only (package pointer is null).

Features are not available for xtensa platform which seems to
require 16 byte alignment from the package. It is only an assumption
due to lack of the documentation and may be fixed in the future.

Feature allows to avoid unnecessary padding when package is part of
a message and preceeded by a header of a known size. For example,
message header on 32 bit architecture has 12 bytes, long doubles are
not used so cbprintf requires 8 byte alignment. Without alignment
offset indicator, package containing just a string with one argument
would need 4 byte padding after the header and 4 byte padding after
the package. Message would be 32 bytes long. With alignment offset
indication both paddings are not needed and message is only 24 bytes
long.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-29 14:08:41 +02:00
Flavio Ceolin
9fd4ea91b7 coccinelle: Remove extra semicolon
coccicheck --mode=patch --cocci=semicolon.cocci

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-03-25 11:35:30 -05:00
Anas Nashif
a387221f3c clock: rename z_clock_hw_cycles_per_sec_runtime_get
Do not use z_ for internal APIs, z_ is for private APIs within one
subsystem only.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-19 11:22:17 -04:00
Krzysztof Chruscinski
a61708377d lib: os: cbprintf: Fix static packaging for sparc
Sparc architecture is strange. Va_list arguments are packed (1 byte
alignment) while unaligned access fails. Added dedicated handling of
Z_CBPRINTF_STORE_ARG which is copying the data word by word.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-18 19:33:19 -04:00
Krzysztof Chruscinski
beb62d2946 lib: os: cbprintf: Minor fixes
Added missing errno.h include. Fixed Z_CBPRINTF_ARG_SIZE macro for
void * and cleaned up macro description.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-18 19:33:19 -04:00
Kumar Gala
7d35a8c93d kernel: remove arch_mem_domain_destroy
The only user of arch_mem_domain_destroy was the deprecated
k_mem_domain_destroy function which has now been removed.  So remove
arch_mem_domain_destroy as well.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-18 16:30:47 +01:00
Andrew Boie
acda9bf9ce linker-tool-gcc: revise for MMU support
We need to do a few things differently if we are to support
a virtual memory map, i.e. CONFIG_MMU where CONFIG_KERNEL_VM_BASE
is not the same as CONFIG_SRAM_BASE_ADDRESS.

 - All sections must be specified with a VMA and LMA, where
   VMA is the virtual address and LMA is the physical memory
   location.
 - All sections must be specified with ALIGN_WITH_INPUT to
   keep VMAs and LMAs synchronized

To do this, the existing linker macros need some adjustment:

 - GROUP_LINK_IN undefined when CONFIG_KERNEL_VM_BASE is not
   the same as CONFIG_SRAM_BASE_ADDRESS.
 - New macro GROUP_ROM_LINK_IN for text/rodata sections
 - New macro GROUP_NOLOAD_LINK_IN for bss/noinit sections
 - Implicit ALIGN_WITH_INPUT for all sections

GROUP_FOLLOWS_AT is unused anywhere in the kernel for years
now and has been removed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Andrew Boie
5ca6f22cba kernel: mmu: restore address conversion functions
This reverts commit 7d32e9f9a5.

These functions are needed for linking kernel in virtual address
space when it differs from the physical address space.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-03-16 15:03:44 -04:00
Nicolas Pitre
f2fd0e8bb6 lib/os/heap: make printed heap info more useful
Turn sys_heap_dump() into sys_heap_print_info() to better reflect
what it actually does, and improve the information being printed.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-03-16 16:06:53 +01:00
Krzysztof Chruscinski
d82e31f903 lib: os: cbprintf: Fix Z_C_GENERIC not being used
Due to the fact that define was created after including
cbprintf_internal.h, it was not used there. Change the order and fix
the issue that was revealed.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-12 09:25:15 -05:00
Krzysztof Chruscinski
9966d85c0a lib: os: cbprintf: Add alignment check to cbprintf_package
Added validation of alignment to cbprintf_package. Error is returned if
input buffer is not aligned to the largest argument.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-11 09:54:39 +01:00
Krzysztof Chruscinski
47a565367e lib: os: cbprintf: Add static packaging
Extend cbprintf with static packaging.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-11 09:54:39 +01:00
Guðni Már Gilbert
fd6737ebc4 docs: Add missing retval for sys_mutex_unlock()
Should return 0 if mutex is unlocked, like k_mutex_unlock()

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-10 05:42:06 -05:00
Guðni Már Gilbert
d60a2e816f docs: Fix typo in mutex docs
-EACCESS should be -EACCES

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-10 05:42:06 -05:00
Guðni Már Gilbert
1c9712aa2a include: sys: Simplify sys_mutex_unlock
Remove redundant if() statements that are already included with
k_mutex_unlock()

Relates to issue #32994

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-03-10 05:42:06 -05:00
Andy Ross
820c94e5dd arch/xtensa: Inline atomics
The xtensa atomics layer was written with hand-coded assembly that had
to be called as functions.  That's needlessly slow, given that the low
level primitives are a two-instruction sequence.  Ideally the compiler
should see this as an inline to permit it to better optimize around
the needed barriers.

There was also a bug with the atomic_cas function, which had a loop
internally instead of returning the old value synchronously on a
failed swap.  That's benign right now because our existing spin lock
does nothing but retry it in a tight loop anyway, but it's incorrect
per spec and would have caused a contention hang with more elaborate
algorithms (for example a spinlock with backoff semantics).

Remove the old implementation and replace with a much smaller inline C
one based on just two assembly primitives.

This patch also contains a little bit of refactoring to address the
scheme has been split out into a separate header for each, and the
ATOMIC_OPERATIONS_CUSTOM kconfig has been renamed to
ATOMIC_OPERATIONS_ARCH to better capture what it means.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-03-08 11:14:27 -05:00
Nicolas Pitre
14e5e98822 lib: cbprintf: add support for deferred formatting
In applications like logging the call site where arguments to
formatting are available may not be suitable for performing the
formatting, e.g. when the output operation can sleep.  Add API that
supports capturing data that may be transient into a buffer that can
be saved, and API that then produces the output later using the
packaged arguments.

[ Documentation and commit log from Peter Bigot. ]

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-03-05 09:29:35 +01:00
James Harris
497b837aeb sys: tell compiler about impossible aliasing in dlist APIs
The compiler was inserting additional redundant loads in many
`sys_dlist_*` APIs, in case writes aliased with previous reads.

However, these additional reads are unnecessary, as the only cases
where the aliasing would matter would be a violation of the `dlist`
API contract (e.g. if node->next == node but node->prev != node).

This is decidedly a micro-optimization.

Signed-off-by: James Harris <james.harris@intel.com>
2021-03-02 19:39:24 -05:00
Rajavardhan Gundi
4269ecd2bc lib: os: Introduce support for CRC32C algorithm
This introduces the support for CRC32C (Castagnoli) algorithm.
The generator polynomial used is 0x1EDC6F41UL.

Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
2021-03-02 14:08:30 +01:00
Krzysztof Chruscinski
71cdcb7756 sys: util: Update implementation of loop macros
Recursive macros are more generic but they are very depending for
preprocessor. When they are used extensively they can prolong
compilation even ten times. Replaced them with brute force
implementation for:
- FOR_EACH macros
- GET_N_ARG
- GET_ARGS_LESS_N
- UTIL_LISTIFY
- UTIL_REPEAT

New implementation provides same functionality but it is limited to 64
input arguments. This is not a hard limitation and can be increased
in the future.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-02-28 16:46:44 -05:00
Martí Bolívar
b65669af14 Revert "sys: util: Update implementation of loop macros"
This reverts commit de84575e2e.

Its merge broke the USB audio sample, which is failing CI in unrelated
PRs.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-02-25 10:01:31 -05:00
Krzysztof Chruscinski
de84575e2e sys: util: Update implementation of loop macros
Recursive macros are more generic but they are very depending for
preprocessor. When they are used extensively they can prolong
compilation even ten times. Replaced them with brute force
implementation for:
- FOR_EACH macros
- GET_N_ARG
- GET_ARGS_LESS_N
- UTIL_LISTIFY
- UTIL_REPEAT

New implementation provides same functionality but it is limited to 64
input arguments. This is not a hard limitation and can be increased
in the future.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-02-23 12:35:48 +01:00
Andy Ross
38195d5dd1 kernel/include: Put kernel stack memory in the right memory
The CONFIG_KERNEL_COHERENCE framework merged with a typo that left its
validation asserts disabled.  But it was written before the "kernel
stacks" feature merged, and so missed the K_KERNEL_STACK_* macros,
which need to put their stacks into __stackmem and not merely
__noinit.

Turning the asserts on exposed the bug.

Fixes #32112

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-02-11 14:47:40 -05:00
Nicolas Pitre
2d65d72cc6 lib/os/heap: add alignment precisions to the documentation
sys_heap_alloc() returns memory aligned to sizeof(void *).

sys_heap_aligned_alloc() may accept 0 for align which defaults
to sizeof(void *). Semantically we can consider 0 as "don't care".

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-02-02 19:08:24 -05:00
Nicolas Pitre
c822e0abbd libc/minimal: fix realloc() allocated memory alignment
The definition for realloc() says that it should return a pointer
to the allocated memory which is suitably aligned for any built-in
type.

Turn sys_heap_realloc() into a sys_heap_aligned_realloc() and use it
with __alignof__(z_max_align_t) to implement realloc() with proper
memory alignment for any platform.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-02-02 19:08:24 -05:00
Lauren Murphy
d922fed7f7 doc: Fix sys_mutex and futex missing documentation
Adds API reference for sys_mutex and futex to mutex documentation,
adds Doxygen documentation for SYS_MUTEX_DEFINE and fixes typo in
futex documentation.

Fixes #27829

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2021-02-02 14:01:57 -05:00
Peter Bigot
96cf9949f7 lib: cbprintf: use doxygen-friendly reference to Kconfig options
Use the @option directive to ensure the generated documentation links
to the specified Kconfig option.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-27 13:34:06 -05:00
Peter Bigot
8528e45897 lib: cbprintf: add libc f/printf substitutes
This allows applications that may not use minimal libc avoid the cost
of a second printf-like formatting infrastructure by using printfcb()
instead of printf() for output.  It also helps make sure that the
formatting support (e.g. floats) is consistent between user-directed
output and the logging infrastructure.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-27 13:34:06 -05:00
Peter Bigot
3e86315577 lib: cbprintf: fix documentation errors
A prototype missed the condition for its availability; another
documented arguments that are not present.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-27 13:34:06 -05:00
Andrew Boie
6c97ab3167 mmu: promote public APIs
These are application facing and are prefixed with k_.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
b9bbef2a2c kernel: add app-facing demand paging APIs
Routines to evict memory, page-in memory, and set pinned state
at runtime.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
5db615bb38 mmu: add k_mem_free_get()
Return the amount of physical anonymous memory remaining.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
8ccec8eba6 kernel: add k_mem_map() interface
Allows applications to increase the data space available to Zephyr
via anonymous memory mappings. Loosely based on mmap().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Andrew Boie
e35f179db3 kernel: add page frame management
Initialize the page frame ontology at boot and update it
when we do memory mappings.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-23 19:47:23 -05:00
Anas Nashif
8e84eaf73e Revert "kernel: add page frame management"
This reverts commit 2ca5fb7e06.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
0417b97257 Revert "kernel: add k_mem_map() interface"
This reverts commit 69d39af5e6.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
6b82664a5a Revert "mmu: add k_mem_free_get()"
This reverts commit 9111ec2c19.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
495c6c72ab Revert "kernel: add app-facing demand paging APIs"
This reverts commit d5b8fe16ad.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif
ef17f889dc Revert "mmu: promote public APIs"
This reverts commit 63fc93e21f.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Andy Ross
e932a1537c arch: tests: Document interrupt delivery behavior after arch_irq_disable()
Upcoming changes from Andrew that add a global timeout to the kernel
broke because of some voodoo behavior in the kernel/context test.  It
will use arch_irq_disable() on the timer interrupt directly to prevent
interrupts and measure timekeeping in their absence.  But some
architectures[1] don't reliably deliver interrupts that arrive, which
means that a running timeout that exists across this period will
result in a corrupt timeout queue.

Document that rule for architectures, move the offending test to the
end of the test suite (to minimize the chance of interacting with
other test code) and put a giant warning about the situation on it.
Long term, we may want to rework this test to do its job in other
ways.

[1] On x86, the interrupt disable happens at the IO-APIC level, while
interrupt latching and delivery is downstream in each CPU's Local
APIC.  An IO-APIC masked interrupt is completely invisible to the APIC
and can never be delivered once the line goes low.

Fixes #31333

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-01-21 17:50:01 -05:00
Andrew Boie
63fc93e21f mmu: promote public APIs
These are application facing and are prefixed with k_.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
d5b8fe16ad kernel: add app-facing demand paging APIs
Routines to evict memory, page-in memory, and set pinned state
at runtime.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
9111ec2c19 mmu: add k_mem_free_get()
Return the amount of physical anonymous memory remaining.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
69d39af5e6 kernel: add k_mem_map() interface
Allows applications to increase the data space available to Zephyr
via anonymous memory mappings. Loosely based on mmap().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Andrew Boie
2ca5fb7e06 kernel: add page frame management
Initialize the page frame ontology at boot and update it
when we do memory mappings.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2021-01-21 16:47:00 -05:00
Peter Bigot
7b3dc4856a doc: add a section for timeutil APIs
Describe the role of these APIs, key concepts that they depend on, and
expose the low-level API.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-20 16:38:56 -05:00
Peter A. Bigot
f6d7595d4e lib/timeutil: add utilities to manage local/reference clock alignment
Provide data structures to capture a timestamp in two different
clocks, monitor the drift between those clocks, and using a base
instant with estimated drift convert between the clocks.

This provides the core technology to convert between system uptime and
an external continuous time scale like TAI (UTC without applying leap
seconds).

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2021-01-20 16:38:56 -05:00
Carlo Caione
e77c841023 cache: Expand the APIs for cache flushing
The only two supported operations for data caches in the cache framework
are currently arch_dcache_flush() and arch_dcache_invd().

This is quite restrictive because for some architectures we also want to
control i-cache and in general we want a finer control over what can be
flushed, invalidated or cleaned. To address these needs this patch
expands the set of operations that can be performed on data and
instruction caches, adding hooks for the operations on the whole cache,
a specific level or a specific address range.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-19 14:31:02 -05:00
Carlo Caione
20f59c8f1e cache: Rename CACHE_FLUSHING to CACHE_MANAGEMENT
The new APIs are not only dealing with cache flushing. Rename the
Kconfig symbol to CACHE_MANAGEMENT to better reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-01-19 14:31:02 -05:00
Andy Ross
d2eadfa162 lib/os: P4 Work Queue: Pooled Parallel Preemptible Priority-based
This adds a somewhat special purpose IPC mechanism.  It's intended for
applications which have a "work queue" like architecture of discrete
callback items, but which need the ability to schedule those items
independently in separate threads across multiple CPUs.  So P4 Work
items:

1. Can run at any Zephyr scheduler priority and with any deadline
   (this feature assumes EDF scheduling is enabled)

2. Can be submitted at any time and from any context, including being
   resubmitted from within their own handler.

3. Will preempt any lower priority work as soon as they are runnable,
   according to the standard rules of Zephyr priority scheduling.

4. Run from a pool of worker threads that can be allocated efficiently
   (i.e. you need as many as the number of CPUs plus the number of
   preempted in-progress items, but no more).

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2021-01-15 11:35:50 -05:00
Daniel Leung
fe477ea6d3 kernel: userspace: aligned memory allocation for dynamic objects
This allows allocating dynamic kernel objects with memory alignment
requirements. The first candidate is for thread objects where,
on some architectures, it must be aligned for saving/restoring
registers.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-13 09:43:55 -08:00
Peter Bigot
d12a99588b lib: cbprintf: remove cbprintf_arglen
This function was designed to support the logging infrastructure's
need to copy values from va_list structures.  It did not meet that
need, since some values need to be changed based on additional data
that is only available when the complete format specification is
examined.  Remove the function as unnecessary.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-07 14:02:06 +01:00
Fabio Utzig
e64f4f950e doc: add kernel stack macros to stack apis
Fix broken references to K_THREAD_STACK_* and K_KERNEL_STACK_* macros
by adding those to the existing stack_apis group.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-12-18 12:18:50 +01:00
Fabio Utzig
8713da70a3 doc: fix @param usage in callbacks
The proper usage of @param in callbacks is currently unsupported by
Doxygen so not warnings are generated. The issues fixed with this commit
where found while adding support to Doxygen for validating @param in
callbacks like it currently does for functions.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-12-18 12:18:28 +01:00
Andrew Boie
d2ad783a97 mmu: rename z_mem_map to z_phys_map
Renamed to make its semantics clearer; this function maps
*physical* memory addresses and is not equivalent to
posix mmap(), which might confuse people.

mem_map test case remains the same name as other memory
mapping scenarios will be added in the fullness of time.

Parameter names to z_phys_map adjusted slightly to be more
consistent with names used in other memory mapping functions.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-12-16 08:55:55 -05:00
Alexander Wachter
2331d10d4b include: sys: thread_stack add missing extern "C" on C++
Add C linkage for compiling with C++

Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
2020-12-15 11:13:41 +01:00
Anas Nashif
e0f3833bf7 power: remove SYS_ and sys_ prefixes
Remove SYS_ and sys_ from all PM related functions and defines.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-12-09 15:18:29 -05:00
Tomasz Bursztyka
e137e9b468 sys_io: Expand the API to 64bits read/write functions
And implement the support for intel64 which is basically the
architecture that will require it for now.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-12-08 09:29:20 -05:00
Tomasz Bursztyka
4199cd38f1 drivers/pcie: Add support for MSI multi-message
This enables software MSI "multi-vector" feature, letting the user to
register an isr handler per-MSI message.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-12-08 09:29:20 -05:00
Andy Ross
0c15627cc1 lib: Remove sys_mem_pool implementation
This has been replaced by sys_heap now and all dependencies are gone.
Remove.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-12-07 21:50:14 -05:00
Andy Ross
40c1b55cc2 lib/os/heap: Add sys_heap_realloc()
Add an optimized realloc() implementation that can successfully expand
allocations in place if there exists enough free memory after the
supplied block.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-12-07 21:50:14 -05:00
Peter Bigot
bb99422c8a lib/os: replace z_vprintk with cbprintf
Using the same implementation as the rest of Zephyr reduces code size.

Update options and expected results for formatting test.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-11-13 06:38:01 -05:00
Peter Bigot
33103828dc lib: add cbprintf capability
This commit adds a C99 stdio value formatter capability where
generated text is emitted through a callback.  This allows generation
of arbitrarily long output without a buffer, functionality that is
core to printk, logging, and other system and application needs.

The formatter supports most C99 specifications, excluding:
* %Lf long double conversion
* wide character output

Kconfig options allow disabling features like floating-point
conversion if they are not necessary.  By default most conversions are
enabled.

The original z_vprintk() implementation is adapted to meet the
interface requirements of cbvprintf, and made available as an opt-in
feature for space-constrained applications that do not need full
formatting support.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-11-13 06:38:01 -05:00
Peter Bigot
ca818d5fb9 sys: util: add BIT64_MASK
BIT/_MASK doesn't necessarily handle 64 bits, so provide comparable
functionality for BIT64/_MASK.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-11-13 06:38:01 -05:00
Daniel Leung
9be37553ee timing: do not repeatedly do init()/start()/stop()
We should not be initializing/starting/stoping timing functions
multiple times. So this changes how the timing functions are
structured to allow only one initialization, only start when
stopped, and only stop when started.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-11-11 23:55:49 -05:00
Krzysztof Chruscinski
243a470810 lib: os: ring_buffer: Cleaning checkpatch warnings
Removing line exceeding warnings which appeared after u32_t -> uint32_t
converstion.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-11-11 13:17:49 +01:00
Krzysztof Chruscinski
1e46bb3bb5 lib: os: ring_buffer: Allow using full buffer capacity
Previously, ring buffer had capacity of provided buffer size - 1. This
trick was used to distinguish between empty and full states. It had one
drawback: ring buffer could not be used as a pool of equal sized buffers
(using ring_buf_put_claim and ring_buf_get_claim).
Reworked internals to use non wrapping head and tail. Since they are
non wrapping, there is no issue with distinguishing between empty and
full. Since this appraoch would be vulnerable to wrapping on 32 bit
boundary, added a mechanism which periodically reduces all indexes to
avoid 32 bit wrapping.

After this rework, buffer has one byte more capacity. Simple test shows
slight performance improvement.

Updated tests to reflect increased capacity and added test to check if
it is possible to continuesly allocated 2 buffers of half ring buffer
size.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-11-11 13:17:49 +01:00
Fabio Utzig
448db8087c doc: fix reference/util after sys/util.h split
Add back Doxygen documentation that previously existed in sys/util.h
and was moved to sys/util_macro.h.

Also fixes #29896

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-11-10 15:40:31 +01:00
Trond Einar Snekvik
ed1f75da74 sys: util: Add clamp macro
Adds CLAMP macro to complement the current min/max macros, as well as a
gcc specific Z_CLAMP macro for single-evaluation expansion.

CLAMP combines the functionality of MIN and MAX, eliminating the
bug-prone usage of MIN(MAX(value, FLOOR), CEIL) found throughout the
codebase in every possible combination.

Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
2020-11-05 12:12:17 +01:00
Fabio Utzig
ab9602d401 doc: allow macro resolving in \deprecated usage
Breathe>=4.23.0 renders \xrefitem, including its specializations like
\deprecated, so add the proper `()` to symbols existing in previously
declared \deprecated messages so they are properly resolved.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-10-27 13:09:24 +01:00
Daniel Leung
62cf1960ad kernel: support using thread local storage for errno
This enables storing errno in the thread local storage area.
With this enabled, a syscall to access errno can be avoided
when userspace is also enabled.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
388725870f arm: cortex_m: add support for thread local storage
Adds the necessary bits to initialize TLS in the stack
area and sets up CPU registers during context switch.

Note that since Cortex-M does not have the thread ID or
process ID register needed to store TLS pointer at runtime
for toolchain to access thread data, a global variable is
used instead.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Daniel Leung
97db4ac0ca libc: add hidden option CONFIG_NEED_LIBC_MEM_PARTITION
The z_libc_partition was only enabled when newlib is being used,
and/or stack canaries are needed. This adds a hidden option
where this partition can be enabled if needed, regardless of
whether newlib is used or stack canaries are needed.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-10-24 10:52:00 -07:00
Gerson Fernando Budke
6b05121e65 include: sys: util: Move macros from util to util_macro
The <sys/util.h>, in current form, can not be used with DTS as it
contains non-C pre-processor definitions which breake DTS interpreter.
This commit fixes the problem by moving most of preprocessor macros
from util.h to util_macro.h.  Since util_mcaro.h contains only
preprocessor macros, without include dependencies, it can be safely
included in DTS. It is similar way the
<dts/arm/<manufacturer>/pinctrl_<manufacturer>_<soc>.h files are
included.

This fix and align the extern "C" closing brack inside non assembly
block.

The issue was raised when try create a macro for pincrtl with a
variable length flag list.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-10-23 09:38:55 -05:00
Andrew Boie
afe42bd129 arch_interface: update arch_mem_domain_thread_add
Implementations may assume the target thread isn't already
a member of the memory domain.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 16:47:07 -07:00
Andrew Boie
941322c49e userspace: document multiple mem domain init calls
k_mem_domain objects should not be initialized multiple times,
there's no support for memory domain life-cycles or freeing
memory that an arch_mem_domain_init() may have allocated.
Clearly document this.

The init function has to assume the provided domain is un-
initialized memory so it's not possible to robustly check
for this; a note is left in the arch_ definition to add an
assertion if feasible.

It's really unsafe to call an init function on any kernel
object more than once, but in this particular case if the
memory domain initialization resulted in the creation of
page tables or linked data structures really bad things can
happen. Currently no arch implements arch_mem_domain_init()
yet, but this is changing soon for x86.

One test case currently does this, it will be fixed in
a forthcoming patch.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-22 15:35:25 -04:00
Maximilian Bachmann
f219a982ff include: sys: use C linkage
add extern C when C++ is used to treat the code as C

Signed-off-by: Maximilian Bachmann <m.bachmann@acontis.com>
2020-10-22 07:49:07 -05:00
Andy Ross
a8d5437799 soc/xtensa: Misc. checkpatch fixups
Code style fixes.  Kept separate from the original changes to permit
easier rebasing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
f6d32ab0a4 kernel: Add cache coherence management framework
Zephyr SMP kernels need to be able to run on architectures with
incoherent caches.  Naive implementation of synchronization on such
architectures requires extensive cache flushing (e.g. flush+invalidate
everything on every spin lock operation, flush on every unlock!) and
is a performance problem.

Instead, many of these systems will have access to separate "coherent"
(usually uncached) and "incoherent" regions of memory.  Where this is
available, place all writable data sections by default into the
coherent region.  An "__incoherent" attribute flag is defined for data
regions that are known to be CPU-local and which should use the cache.
By default, this is used for stack memory.

Stack memory will be incoherent by default, as by definition it is
local to its current thread.  This requires special cache management
on context switch, so an arch API has been added for that.

Also, when enabled, add assertions to strategic places to ensure that
shared kernel data is indeed coherent.  We check thread objects, the
_kernel struct, waitq's, timeouts and spinlocks.  In practice almost
all kernel synchronization is built on top of these structures, and
any shared data structs will contain at least one of them.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Peter Bigot
3dd804fe91 sys: util: add identity macro
Several utility macros must be given the name of a macro to apply to
every element in a sequence to transform it.  When no transformation
is necessary a macro still needs to be provided.  That macro is
IDENTITY.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-10-19 18:14:11 +02:00
Andrew Boie
95bbc742ba kernel: move kernel object APIs to own header
Part of an effort to break up the gigantic kernel.h.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-10-12 12:21:46 -04:00
Kumar Gala
014342a6f6 sys: ring_buffer: remove deprecated macros
Remove SYS_RING_BUF_DECLARE_POW2 and SYS_RING_BUF_DECLARE_SIZE as they
have been marked deprecated for at least 2 releases.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-06 14:58:42 -04:00
Aastha Grover
83b9f69755 code-guideline: Fixing code violation 10.4 Rule
Both operands of an operator in the arithmetic conversions
performed shall have the same essential type category.

Changes are related to converting the integer constants to the
unsigned integer constants

Signed-off-by: Aastha Grover <aastha.grover@intel.com>
2020-10-01 17:13:29 -04:00
Eric Johnson
c27561d984 sys: byteorder: Fix incorrect shift in sys_get_be48/le48
Fixes an incorrect left-shift value that was introducing
extra 0x00 bytes to the result.

Signed-off-by: Eric Johnson <eric@liveathos.com>
2020-09-21 11:17:59 +02:00
Fabio Utzig
39fa56b834 doc: update Kconfig options to use @option ALIAS
This updates Kconfig options in the Doxygen documentation to use the new
@option ALIAS. There are three categories of fixes:

* Use of `:option:` inside Doxygen headers, which is not valid (this is
  rST syntax!).
* Kconfig options that were just written as plain text and were no
  references were generated.
* Use of `@rst` blocks where the only reason for using them was to have
  Kconfig options resolved.

Signed-off-by: Fabio Utzig <fabio.utzig@nordicsemi.no>
2020-09-15 15:25:01 +02:00
Anas Nashif
6e27478c3d benchmarking: remove execution benchmarking code
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.

For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.

Furthermore, much of the assembly code used had issues.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-09-05 13:28:38 -05:00
Andrew Boie
5e0b55c30e kernel: demote k_mem_map to z_mem_map
Memory mapping, for now, will be a private kernel API
and is not intended to be application-facing at this time.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-09-03 14:24:38 -04:00
Andrew Boie
7d32e9f9a5 mmu: support only identity RAM mapping
We no longer plan to support a split address space with
the kernel in high memory and per-process address spaces.
Because of this, we can simplify some things. System RAM
is now always identity mapped at boot.

We no longer require any virtual-to-physical translation
for page tables, and can remove the dual-mapping logic
from the page table generation script since we won't need
to transition the instruction point off of physical
addresses.

CONFIG_KERNEL_VM_BASE and CONFIG_KERNEL_VM_LIMIT
have been removed. The kernel's address space always
starts at CONFIG_SRAM_BASE_ADDRESS, of a fixed size
specified by CONFIG_KERNEL_VM_SIZE.

Driver MMIOs and other uses of k_mem_map() are still
virtually mapped, and the later introduction of demand
paging will result in only a subset of system RAM being
a fixed identity mapping instead of all of it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-09-03 14:24:38 -04:00
Flavio Ceolin
5408f3102d debug: x86: Add gdbstub for X86
It implements gdb remote protocol to talk with a host gdb during the
debug session. The implementation is divided in three layers:

1 - The top layer that is responsible for the gdb remote protocol.
2 - An architecture specific layer responsible to write/read registers,
    set breakpoints, handle exceptions, ...
3 - A transport layer to be used to communicate with the host

The communication with GDB in the host is synchronous and the systems
stops execution waiting for instructions and return its execution after
a "continue" or "step" command. The protocol has an exception that is
when the host sends a packet to cause an interruption, usually triggered
by a Ctrl-C. This implementation ignores this instruction though.

This initial work supports only X86 using uart as backend.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2020-09-02 20:54:57 -04:00
Tomasz Bursztyka
6df8b3995e irq: Change dynamic API to take a constant parameter
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
84942e4fbc irq: Change offload API to take a constant parameter
All ISRs are meant to take a const struct device pointer, but to
simplify the change let's just move the parameter to constant and that
should be fine.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Spoorthy Priya Yerabolu
9247e8bc44 code-guideline: Tag name should be a unique identifier
Following are the changes to variable names that are matching
with tag names (Rule 5.7 violations)

In kernel.h, event_type is matching with a tag name in
lib/os/onoff.c. Added a _ prefix to event_type and
also to the macro argument names.

In userspace.c, *dyn_obj is matching with the tag name
dyn_obj in the file itslef. Changed it to dyn

In device.h, device_mmio.h, init.h and init.c,
changed the *device to dev. Except for one change in
init.h

Signed-off-by: Spoorthy Priya Yerabolu <spoorthy.priya.yerabolu@intel.com>
2020-09-01 08:03:23 -04:00
Andrew Boie
00f71b0d63 kernel: add CONFIG_ARCH_MEM_DOMAIN_SYNCHRONOUS_API
Saves us a few bytes of program text on arches that don't need
these implemented, currently all uniprocessor MPU-based systems.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-08-26 20:35:02 -04:00
Andrew Boie
bcc69f944d mem_manage: add private conversion APIs
Private macros/function for converting a virtual address
to a physical address. Only works for a specific range
of virtual addresses (the permanent SRAM mappings).

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-08-25 15:49:59 -04:00
Martí Bolívar
bd86078376 sys/util.h: add FOR_EACH_NONEMPTY_TERM
This is an extension to the existing FOR_EACH family of macros that
has a couple of twists that make it more useful in certain contexts,
as explained in the docstring.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-08-24 20:29:11 -04:00
Andrew Boie
bc35b0b780 userspace: add optional member to memory domains
Some systems may need to associate arch-specific data to
a memory domain. Add a Kconfig and `arch` field for this,
and a new arch API to initialize it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-08-20 13:58:54 -04:00