Commit Graph

1323 Commits

Author SHA1 Message Date
Henrik Brix Andersen
eb9cf9e0dc soc: arm: nxp: kinetis: k2x: remove MPU support
Remove (disabled) MPU support for the NXP Kinetis K2x. At least the
MK22F51212, which is the only K2x supported by Zephyr so far, does not
contain an MPU.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-05-26 18:14:03 -05:00
Piotr Mienkowski
80ad300b6c dts: same70: use lower case letter in tc0 reg address
The change removes the following warning:
Warning: /soc/tc@4000C000: simple-bus unit address format error,
         expected "4000c000"

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-05-26 18:13:10 -05:00
Arvin Farahmand
d1d494e2b7 drivers: flash: bugfix: set atmel SAM0 write-block-size
`write-block-size` property in multiple Atmel SAM SoCs was either
missing or set incorrectly.

Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
2021-05-25 11:59:45 -05:00
Rico Ganahl
925303ede6 dts: stm32mp1: SPI2 mixup with SAI2, SPI3 mixup with SAI3
Device Tree address mixup between
SAI2 <-> SPI2 and SAI3 <-> SPI3

Add functionality to SPI2/3
Tested on SPI2

Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
2021-05-18 11:19:30 -05:00
Aurelien Jarno
869d252942 dts: arm: stm32f{2,4,7}: fix device tree warning
Switch the interrupt controller address to lower case to avoid this
warning:

  stm32f723e_disco.dts.pre.tmp:97.39-102.5: Warning (simple_bus_reg):
  /soc/interrupt-controller@40013C00: simple-bus unit address format
  error, expected "40013c00"

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2021-05-17 09:52:27 -05:00
Andrzej Głąbek
797aa8b85a soc: nrf9160: Remove incorrect indication of SWO availability
Serial Wire Output functionality is not implemented in nRF9160.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-05-11 13:00:20 -05:00
Alexander Wachter
94f85241aa dts: arm: stm32g4: add can bindings to stm32g4 SoCs
This commit adds the CAN nodes to the STM32g4 SoCs.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
2021-05-07 12:36:10 -05:00
Hake Huang
b336579cbb dts: add edma related in dts bindings
add dts bingings for dma usage
add dts support for adc with edma and hwtrigger
add a periodic_trigger feature to dts

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-05-07 08:23:49 -05:00
Aymeric Aillet
8eed20db0c dts: arm: rcar_gen3_cr7: Add SCIF support to DTS
Add SCIF bus initial support to Renesas R-Car SOC series.
SCIF1 is used as main serial and shell output on R-Car H3 board.

Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
2021-05-07 13:08:48 +02:00
Martí Bolívar
6b15ad1fd5 dts: nrf52811: fix indendation in dtsi
Commit 233149eec5 moved flash sram nodes
under /soc for various nordic ICs, but the indentation isn't right for
52811. Fix it.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Thomas Stranger
0baa7d63b1 dts: stm32g4: fix dmamux number of dmamux request inputs
For dmamux nodes the dma-requests property specifies the number of
peripheral request inputs(not nr. of request trigger inputs).
This commit fixes this for g4 series.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-05-06 09:28:33 -05:00
Gerson Fernando Budke
d999531f7f drivers: spi: Add cypress PSoC-6 scb spi driver
Add Cypress PSoC-6 SCB[spi] driver.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-05-05 16:01:28 +02:00
Gerson Fernando Budke
3155b762a6 dts: spi: Add cypress PSoC-6 controller
Add Cypress PSoC-6 SPI controller and pinctrl nodes.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-05-05 16:01:28 +02:00
Francois Ramu
3a93f9bcc9 dts: arm: stm32l1 has a fixed lsi clock of 37kHz
Correct the clock freq of the lsi for the stm32l1

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-05-05 08:42:21 -04:00
Erwan Gouriou
39a58dd6e6 dts/arm/st: h7: Fix pll2 reg address
reg value should match value provided within node name (as in pll@2).
Fix this to avoid warning.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:57:41 -05:00
Kumar Gala
241f208db6 dts: arm: nxp_kw2xd: Add SPI0 sip pins
As the KW2XD is a SiP (System-in-package) the SPI1 controller on the MCU
is connected to the modem.  As the pinctrl details for this in the
SoC dtsi file as these pins are not exposed in the pindata XMLs from
NXP.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-04 13:03:00 -05:00
Kumar Gala
b118dae7b2 dts: nxp: default SPI0 to being disabled
Set SPI0 controller to default to being disabled in SoC dtsi files and
having the board dtsi files enable it.  The only board that wasn't doing
this already was the frdm_kw41z.dts.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-05-04 13:03:00 -05:00
Erwan Gouriou
a77b2b8d73 dts/arm/st: f1: Use stm32f100 specific binding for pll
stm32f100 devices have a specific pll.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-04 13:02:26 -05:00
Erwan Gouriou
434be55845 dts/arm/st: h7: Add clocks nodes
Add clock nodes for stm32h7 devices.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-05-03 10:56:05 +02:00
Francois Ramu
2493c39ee7 dts: arm: stm32h723 has usart10 in its dts
adding the device node for UART10 in dts/arm/st/h7/stm32h723.dtsi

Signed-off-by: Kshitij Kumar <kshitij9192@gmail.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
2021-04-29 17:06:01 -05:00
Erwan Gouriou
5d2909654f dts/arm: st: Add clocks node on stm32wl series
Add clocks on stm32wl.dtsi.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
f1cc613ac7 dts/arm: stm32: Add clocks nodes for STM2F7 series
Nodes are provided disabled.
Selection should be done at board level.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
0943d6b517 dts/arm: stm32: Add clocks nodes on L0 and L1
Nodes are provided disabled.
Selection should be done at board level.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
e69492abe9 dts/arm: stm32: Add clocks nodes for STM2F2 series
Nodes are provided disabled.
Selection should be done at board level.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
01337645d9 dts/arm/st: l5: Add clocks node to stm32l5.dtsi
Add clocks node and clocks to stm32l5 series.
PLL binding is reused from stm32l4 series.
Matching binding is updated to document that.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
e8a465a446 dts/arm: st: Add clocks nodes for F0/F3/G0/G4
Add clocks nodes for F0/F3/G0/G4 series.

For F0 and G0 series, update compatible for rcc node
to specify use of dedicated "st,stm32f0-rcc" compatible.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Erwan Gouriou
fe8c339080 dts/arm/st: f1: Add clocks nodes
Add clocks nodes for stm32f1*.dtsi

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-29 16:41:26 +02:00
Guðni Már Gilbert
e19389724c dts: arm: st: l4: add SPI2 node for stm32l412
This commit adds a SPI2 node for STM32L412 which
will be used for the board Nucleo L412RB-P.

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-29 09:51:39 -04:00
Erwan Gouriou
8f7ce4186a dts/arm/st: l4: Remove default pll configuration
Remove default pll settings to ensure pll users are correctly
configuring all prescalers on purpose and avoid surprises.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-28 16:43:51 -04:00
Thomas Stranger
b2f6d30dd4 dts/arm: STM32: Adding flash clock settings in dtsi for stm32h7 series.
This commit adds flash clock settings in device tree for stm32h7
series such that the stm32h7 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-04-28 09:06:42 -05:00
Gerson Fernando Budke
e6cba8d9c8 drivers: serial: psoc6: Rework to support pinctrl
The current serial driver uses hard code configuration.  Rework driver
to use pinctrl and enable full configuration from device tree.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-04-27 09:27:45 -05:00
Mario Jaun
086c461edb dts: arm: st: h7: define SRAM1-4
Define SRAM1 to SRAM4 memory areas according to the physical memory
organization of the chips.

Signed-off-by: Mario Jaun <mario.jaun@gmail.com>
2021-04-27 14:16:35 +02:00
Erwan Gouriou
3b51069e5a dts/arm: stm32: Add clocks nodes on stm32wb,l4 and stm32f4 series
Provided nodes reflect the clock tree of each series.
Clock nodes are disabled by default but populated with default
start up configuration. Main reason is the we don't want to
impact boards using Kconfig based clock configuration for now.
Exception to these rules:
- syslck: Default enabled, clock frequency and clock source not
provided
- pll: clock source not provided
This is made on purpose so that errors are triggered if parameters
essential to the board configuration are not provided.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-27 11:53:37 +02:00
Krishna Mohan Dani
6af80f4675 dts/arm: STM32: Move i2s1 to right dtsi files in stm32f4 series.
i2s1 is not present in all stm32f4 series. So moving the i2s1 node
from the top level stm32f4 dtsi file to the stm32fxx specific dtsi
files. Also in stm32f429zi, the sequence starts from i2s2, this commit
helps in having the right channel number.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-26 14:17:46 -04:00
Thomas Stranger
38f993b886 dts: arm: stm32g0: Add dma1, dma2, and dmamux1
STM32G0 is supported by the st,stm32-dma-v2 driver.
This commit adds dma1 and dmamux dts bindings
for stm32g03x, stm32g05x and stm32g07x.
For stm32g0bx additionally dma2 is added.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2021-04-26 14:16:03 -04:00
Guðni Már Gilbert
16c61ca424 dts: arm: st: Add SOC support for STM32G483
This commit adds SOC support for STM32G483 MCUs

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Guðni Már Gilbert
76a6320213 dts: arm: st: Add SOC support for STM32G473
This commit adds SOC support for STM32G473 MCUs

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Guðni Már Gilbert
4700d9e9cf dts: arm: st: Add SOC support for STM32G484
This commit adds SOC support for STM32G484 MCU

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Guðni Már Gilbert
5e4ff3726c dts: arm: st: Add SOC support for STM32G4A1
This commit adds SOC support for STM32G4A1 MCU

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Guðni Már Gilbert
eb03caf59d dts: arm: st: Add SOC support for STM32G441
This commit adds SOC support for STM32G441 MCU

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Guðni Már Gilbert
8871d20bad dts: arm: st: Add SOC support for STM32G491
This commit adds SOC support for STM32G491 MCU.

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Guðni Már Gilbert
b49f5d0056 dts: arm: st: Add stm32g431x6 and stm32g431x8
This commit adds dts files for two SOCs, namely
stm32g431x6 and stm32g431x8

Signed-off-by: Guðni Már Gilbert <gudni.m.g@gmail.com>
2021-04-26 17:40:01 +02:00
Sebastian Schwabe
b29d9f5e8c dts: arm: Add STM32F031k6 dtsi config
This commit adds the dtsi config for the stm32f031k6.

Signed-off-by: Sebastian Schwabe <sebastian-schwabe@gmx.de>
2021-04-26 09:49:52 -05:00
Krishna Mohan Dani
2090b6830b dts/arm: STM32: Adding flash clock settings in dtsi for stm32wb series.
This patch adds flash clock settings in device tree for stm32wb
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-23 14:59:06 +02:00
Krishna Mohan Dani
960d5f50ab dts/arm: STM32: Adding flash clock settings in dtsi for stm32l4 series.
This patch adds flash clock settings in device tree for stm32l4
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-23 14:59:06 +02:00
Krishna Mohan Dani
0401a011f7 dts/arm: STM32: Adding flash clock settings in dtsi for stm32l1 series.
This patch adds flash clock settings in device tree for stm32l1
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-23 14:59:06 +02:00
Krishna Mohan Dani
8a096e1ea9 dts/arm: STM32: Adding flash clock settings in dtsi for stm32g4 series.
This patch adds flash clock settings in device tree for stm32g4
series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-23 14:59:06 +02:00
Krishna Mohan Dani
9b04590e0e dts/arm: STM32: Adding flash clock settings in dtsi for stm32g0 series.
This patch adds flash clock settings in device tree for stm32g0
 series so that the stm32 flash driver can get the clock settings
from this dtsi file.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-23 14:59:06 +02:00
Krishna Mohan Dani
aa30498c60 dts/arm: STM32: Adding flash clock settings in dtsi.
This patch adds flash clock settings in device tree for F0, F1 and
F3 sub-families.

Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
2021-04-23 14:59:06 +02:00
Sidhdharth Yadav
36eb1f6472 dts: arm: stm32: Enable pwm support for stm32l1 in dtsi
Enabling pwm on timer3 for stm32l1 series in dtsi.

Adding other timer nodes for pwm capability.

Signed-off-by: Sidhdharth Yadav <sidhdharth.yadav@hcl.com>
2021-04-22 11:29:34 +02:00