Commit Graph

8146 Commits

Author SHA1 Message Date
Asbjørn Sæbø
9c6e578d50 Bluetooth: Audio: UUID values for the CCID characteristic
UUID values for the Content Control ID characteristic

The Content Control ID characteristic is a separately defined
characteristic used in the media control service and in the telephone
bearer service in LE Audio.

This commit is part of the upmerge of le-audio from the topic-le-audio
branch.

Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
2021-11-02 13:23:42 +01:00
Szymon Janc
47ac14282d bluetooth: host: Add support for SMP error code 0x0f
This error code informs that peer device rejected key during
keys distribution phase.

Signed-off-by: Szymon Janc <szymon.janc@codecoup.pl>
2021-11-01 21:48:52 -04:00
Dmytro Firsov
d9a3efb834 xenvm: drivers: serial: Implement serial interface to Xen PV console
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.

Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-10-29 15:23:33 +02:00
Dmytro Firsov
c4ab278688 arm64: xenvm: Add Xen hypercall interface for arm64
This commit adds Xen hypervisor call interface for arm64 architecture.
This is needed for further development of Xen features in Zephyr.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-10-29 15:23:33 +02:00
Dmytro Firsov
bfe9989d9f xenvm: include: add some of Xen public headers
This commit adds few Xen public headers, which are needed for further
development of Xen features in Zephyr. Headers were taken from
include/public directory of Xen RELEASE-4.15.0 branch, filtered and
cleaned up to leave only parts, which are now required.

Directory structure were saved (public, public/io, public/hvm), so
public headers content can be supplemented if nessesary.

Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
2021-10-29 15:23:33 +02:00
Ramiro Merello
82fd59a94b json: Added element descriptor macro and C++ support progress
Added element descriptor macro with internal helper macros for arrays
and objects.
Improved support for C++ by switching to const struct in element descr

Signed-off-by: Ramiro Merello <rmerello@itba.edu.ar>
2021-10-29 06:05:17 -04:00
Yuval Peress
dee79d2b66 ztest: Add register functionality
Add new functionality to ztest to improve test modularity. The two
primary new entry points are:
* ztest_register_test_suite
* ztest_run_registered_test_suites

When registering a new test suite, users provide the name as well as
an optional predicate used to filter the tests for each run. Using NULL
as the predicate ensures that the test is run exactly once (after which
it is automatically filtered from future runs).

Calls to ztest_run_registered_test_suites take a state pointer as an
argument. This allows the the pragma functions to decide whether the
test should be run.

The biggest benefit of this system (other than the ability to filter
tests and maintain a larger test state) is the ability to better
modularize the test source code. Instead of all the various tests
having to coordinate and the main function having to know which tests
to run, each source file manages registering its own test
suite and handling the conditions for running the suite.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-10-28 16:57:51 -04:00
Martin Jäger
5511cba5fe drivers: can: Add get_max_filters API
The maximum number of concurrent filters depends on the hardware and
the driver implementation. This API allows the application to obtain
the maximum number of available filters.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-10-28 13:56:58 -04:00
Chris Pearson
a6f8fc326c Docs: Clarification of CONTAINER_OF
This is a small reordering of the CONTAINER_OF description to
clarify its purpose.

Signed-off-by: Chris Pearson <ctpearson@gmail.com>
2021-10-28 10:19:39 -04:00
Immo Birnbaum
ee7ac70c10 modules: cmsis: add core_ca inclusion for aarch32 Cortex-A SoCs
Add the inclusion of the Common Peripheral Access Layer for aarch32
Cortex-A SoCs in combination with the respective SoC's header file,
in which the feature flags evaluated in core_ca.h must be provided.

The corresponding CMSIS include path is added to the build by setting
the HAS_CMSIS_CORE_A Kconfig item for all aarch32 Cortex-A CPUs.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
2021-10-28 15:26:50 +02:00
Immo Birnbaum
01882b8624 arch: arm: core: aarch32: support for On-Chip Memory (OCM) areas in aarch32
Introduce support for On-Chip Memory (OCM) areas in aarch32 Cortex-A
SoCs. This memory area is suitable for, amongst other things, un-
cached device DMA. The OCM memory can reside either at address zero
or at a high memory address, with configuration of the memory's lo-
cation similar to the configuration of the location of the exception
vectors. In both cases, it must be assured that the low/high OCM
area declaration doesn't overlap with the exception vectors memory
page at either the low/high address. Therefore, all possible OCM
location options shall be described in the SoC's device tree, the
current location shall be indicated via a "chosen" entry in the
target board's device tree.

This commit contains the necessary changes to the linker-related
files as well as the static region declaration for the MMU in-
itialization in the Zynq-7000 SoC-specific init code.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Immo Birnbaum
266875ead0 drivers: ethernet: xlnx_gem: Zynq-7000 support for the Xilinx GEM driver
Add support for the Xilinx Zynq-7000 SoC family to this driver. This
includes some SoC-specific register accesses when setting an updated
TX clock divider, also, the device tree binding now supports higher
MDC clock divisor values when the current target SoC is a Zynq rather
than a ZynqMP.

With regards to the use of this driver in a QEMU simulation of the
Zynq-7000, the Kconfig file is modified so that the driver is not
enabled unless QEMU networking is set to Ethernet mode.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Immo Birnbaum
315ad1d6e6 drivers: timer: arm_arch_timer: Workaround for Cortex-A9 erratum 740657
Modification of the ARM architected timer driver and its configuration
data in order to address an erratum which exists at least in the Cor-
tex-A9 CPU, and which can also be observed in the QEMU implementation
of the Cortex-A9.

Comp.: ARM Cortex-A9 processors Software Developer Errata Notice
ARM document ID032315
Erratum 740657

This erratum causes a spurious interrupt pending indication with the
interrupt controller if no new compare value is written within the
timer ISR before the interrupt is cleared. This is usually the case
in tickless mode. If the spurious interrupt is not prevented, the
timer ISR will be called twice, but on second execution, the pending
flag is not set within the timer's register space. Not handling this
issue will lead to erratic tick announcements to the kernel.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Immo Birnbaum
c6141c49c1 arch: arm: core: aarch32: enable ARMv7-R/Cortex-R code for ARMv7-A/Cortex-A
Modify #ifdefs so that any code that is compiled if CONFIG_ARMV7_R is
set is also compiled if CONFIG_ARMV7_A is set.
Modify #ifdefs so that any code that is compiled if CONFIG_CPU_CORTEX_R
is set is also compiled if CONFIG_CPU_AARCH32_CORTEX_A is set.
Modify source dir inclusion in CMakeLists.txt accordingly.

Brief file descriptions have been updated to include Cortex-A whereever
only Cortex-M and Cortex-R were mentioned so far.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Immo Birnbaum
70c403c215 arch: arm: core: aarch32: introduce basic ARMv7 MMU support
An initial implementation for memory management using the ARMv7 MMU.
A single L1 translation table for the whole 4 GB address space is al-
ways present, a configurable number of L2 page tables are linked to
the L1 table based on the static memory area configuration at boot
time, or whenever arch_mem_map/arch_mem_unmap are called at run-time.

Currently, a CPU with the Multiprocessor Extensions and execution at
PL1 are always assumed. Userspace-related features or thread stack
guard pages are not yet supported. Neither are LPAE, PXN or TEX re-
mapping. All mappings are currently assigned to the same domain. Re-
garding the permissions model, access permissions are specified using
the AP[2:1] model rather than the older AP[2:0] model, which, accor-
ding to ARM's documentation, is deprecated and should no longer be
used. The newer model adds some complexity when it comes to mapping
pages as unaccessible (the AP[2:1] model doesn't support explicit
specification of "no R, no W" permissions, it's always at least "RO"),
this is accomplished by invalidating the ID bits of the respective
page's PTE.

Includes sources, Kconfig integration, adjusted CMakeLists and the
modified linker command file (proper section alignment!).

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
2021-10-28 15:26:50 +02:00
Martin Jäger
053ee94d49 drivers: can: Improve rendering of API comments
- Hide internal driver API from public documentation
- Use consistent upper-case naming for CAN, RTR, etc.
- Fix indentation of some comments so that they are
  rendered with monospace font.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-10-27 15:11:48 -04:00
Radoslaw Koppel
d1a93c1426 drivers: sensor: Const sensor trigger data in trigger handler
This commit adds const modifier in second argument for
sensor trigger handler.
There is no reason to modify this data and this change
would allow to store trigger configuration also in FLASH.

Fixes: #38929

Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
2021-10-27 15:09:35 -04:00
Felipe Neves
1e328fe109 clock_control: esp32c3: added clock control
gating driver support for esp32c3 SoC family

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-27 15:09:08 -04:00
Pieter De Gendt
421ecb77a3 net: coap: Add coap_next_block_for_option function
Add a function to update the coap block context from a
packet, according to the block option enum provided.

The existing coap_next_block does not handle block1 transfers
properly because we need to inspect the block1 option
returned by the server. This function is reworked to make use
of the newly introduced one.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-10-27 13:46:19 -04:00
Carlo Caione
1976f33e87 drivers: mbox: Introduce MBOX driver class
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.

If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.

This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-10-27 18:27:21 +02:00
Nicolas Pitre
bd73cd5512 sys: util: provide bitfield construction/extraction utility macros
Those are especially useful with hardware device registers.
They behave the same way as their Linux equivalent, with a much
simpler implementation for now.

Example:

 #define REG_FIELD_A  GENMASK(6, 0)
 #define REG_FIELD_B  BIT(7)
 #define REG_FIELD_C  GENMASK(15, 8)
 #define REG_FIELD_D  GENMASK(31, 16)

Get:
 a = FIELD_GET(REG_FIELD_A, reg);
 b = FIELD_GET(REG_FIELD_B, reg);

Set:
 reg = FIELD_PREP(REG_FIELD_A, 1) |
       FIELD_PREP(REG_FIELD_B, 0) |
       FIELD_PREP(REG_FIELD_C, c) |
       FIELD_PREP(REG_FIELD_D, 0x40);

Modify:
 reg &= ~REG_FIELD_C;
 reg |= FIELD_PREP(REG_FIELD_C, c);

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-10-27 10:43:05 -04:00
Flavio Ceolin
9239fd4a90 pm: device: Simplify device pm states
As discussed in issues/38619, this commit aims to simplify device
power management. It was removed PM_DEVICE_SATE_LOW_POWER.
The power subsystem now doesn't need to figure out which device state to
use of a given system power state. It just suspend and resume devices.

Devices now just need to respond to ACTIVE and SUSPEND and OFF actions
and they are free to use any particular substate they have when the
subsystem asks to suspend. They also don't need to worry about states
transitions (unless they have multiple substates) because the system
will just request them to suspend if they are active and vice-versa.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>

rebase
2021-10-26 15:02:15 -05:00
Flavio Ceolin
a507f60390 pm: Add a new function to query the next power state
Add a function that can be used by device drivers to know
what will be next power state used by the SoC.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-10-26 15:02:15 -05:00
Jordan Yates
526b3e9605 lora: asynchronous packet reception
Adds functionality to receive LoRa packets asynchronously. Reception
runs continuously until cancelled by another call to `lora_recv_async`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-10-26 15:48:09 +02:00
Jay Vasanth
c214c59548 Microchip: MEC172x: eSPI driver
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-10-26 09:27:20 -04:00
Bartosz Bilas
bf68b670f1 drivers: modem: gsm: extend modem info struct about RSSI value
Add RSSI member into gsm_ppp_modem_info structure in order to
get that information using the gsm_ppp_modem_info function.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-10-26 14:47:38 +03:00
Bartosz Bilas
5107691441 drivers: modem: gsm: allow the user to get modem information
Make modem_info structure public in order to allow the user
to get modem information using gsm_ppp_modem_info function.
Move modem info query commands into separate function
that's called only once during gsm configuring because
there is no necessity to re-querying modem since
they should not change.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-10-26 14:47:38 +03:00
Bartosz Bilas
cb30cc5f8c drivers: modem: gsm: move header file into modem directory
There is a specified location for modem drivers so move this
header right there.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-10-26 14:47:38 +03:00
Gerard Marull-Paretas
329f2453c5 drivers: pinctrl: add support for dynamic pin control
Add support for dynamic pin control, that is, allow to change device pin
configuration at runtime. Because no device de-initialization is
available yet, this API has limited usage options, e.g. modify pin
configuration at early boot stage (before device driver is initialized)

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Gerard Marull-Paretas
aecb0c74b5 drivers: pinctrl: allow to skip states
If a certain state has to be skipped, a macro named
Z_PINCTRL_SKIP_<STATE> can be defined evaluating to 1. This can be
useful, for example, to automatically ignore the sleep state if no
device power management is enabled.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Gerard Marull-Paretas
4040df096f drivers: pinctrl: initial skeleton
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Veijo Pesonen
d3f4ae20cf net: coap: adds PATCH and iPATCH methods
Based on on RFC 8132 -
PATCH and FETCH Methods for the Constrained Application Protocol (CoAP)

Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
2021-10-25 13:26:19 +03:00
Veijo Pesonen
3071e97a3a net: coap: adds FETCH method
Based on on RFC 8132 -
PATCH and FETCH Methods for the Constrained Application Protocol (CoAP)

Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
2021-10-25 13:26:19 +03:00
Tom Burdick
97dc88bb6d tracing: Automatic syscall tracing
When generating syscall wrappers, call a tracing macro with the id,
name, and all parameters of the syscall as params when entering and
leaving the syscall. This can be disabled in certain call sites
by defining DISABLE_SYSCALL_TRACING which is useful for certain
tracing implementations which require syscalls themselves to work.

Notably some syscalls *cannot* be automatically traced this way and
headers where exclusions are set are in the gen_syscall.py as notracing.

Includes a systemview and test format implementation.

Tested with systemview, usb, and uart backends with the string
formatter using the tracing sample app.

Debugging the trace wrapper can be aided by setting the TRACE_DIAGNOSTIC
env var and rebuilding from scratch, a warning is issued for every
instance a syscall is traced.

Automatically generating a name mapping for SYSVIEW_Zephyr.txt is a
future item as is documenting how to capture and use the tracing data
generated.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2021-10-23 20:45:17 -04:00
Jacob Siverskog
046f29a8cb Bluetooth: ATT: Fix typo in defines
Fix typo in ATT first/last attribute defines.

Signed-off-by: Jacob Siverskog <jacob@teenage.engineering>
2021-10-23 20:39:36 -04:00
Sylvio Alves
b0717d518e drivers: gpio: esp32: use dts and improve code checks
This PR updates GPIO driver to use DTS information
regarding gpio availability.

This also fixes interrupt handling and
also removes kconfig definition for GPIO port.

A few configuration checks were also added to
improve code usage.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-10-21 10:53:34 -04:00
Yuguo Zou
4e33cd62d0 arch: arc: Add _ARCH_MEM_PARTITION_ALIGN_CHECK for arc mpu v3 v6
_ARCH_MEM_PARTITION_ALIGN_CHECK was missing for arc mpu v3 and v6.
This commit add the missing macros.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2021-10-21 10:50:03 -04:00
Evgeniy Paltsev
74f8e81e34 ARC: improve _ARCH_MEM_PARTITION_ALIGN_CHECK
* split conditions check
* implement custom _ARCH_MEM_PARTITION_ALIGN_CHECK version
  for MWDT toolchain
* use uintptr_t instead of uint32_t for addresses

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-20 07:24:03 -04:00
Evgeniy Paltsev
235a98e371 ARC: MWDT: enable back BUILD_ASSERT macro
BUILD_ASSERT macro was disabled for MWDT toolchain from the
moment of adding MWDT support to Zephyr. Built-in _Static_assert
is now working fine for the most of the cases with MWDT toolchain
so we can use it in BUILD_ASSERT.

The only exception is _ARCH_MEM_PARTITION_ALIGN_CHECK macro
as it often used with variable addresses as parameters
which need to be checked at compile time. We disable
_ARCH_MEM_PARTITION_ALIGN_CHECK for MWDT toolchain so we can use
BUILD_ASSERT in other places.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-20 07:24:03 -04:00
Tom Burdick
f523c336ef pm: Use stats subsys for tracking system states
Uses the stats subsys to provide simple but useful debugging stats for
power management state changes and timing.

Removes the no longer needed PM_DEBUG config option

Replaces the use of PM_DEBUG for a test clock output pin for mec1501 and
adds in its place an SoC Kconfig option to enable it.

Adds a STATS_SET macro for assigning a value to a stat group field

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2021-10-17 10:56:21 -04:00
Peter Mitsis
ae394bff7c kernel: add support for event objects
Threads may wait on an event object such that any events posted to
that event object may wake a waiting thread if the posting satisfies
the waiting threads' event conditions.

The configuration option CONFIG_EVENTS is used to control the inclusion
of events in a system as their use increases the size of
'struct k_thread'.

Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
2021-10-16 06:27:10 -04:00
Krzysztof Chruscinski
eb3375f47c shell: Add __printf_like to shell_fprintf
Add __printf_like modifier to validate strings used by shell.
Fixing warnings triggered by this change.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-10-14 16:32:19 -04:00
Gerard Marull-Paretas
82d7d3c5c9 pm: rename pm_control(_fn) to (pm_)action_cb
- Rename to "action" to make its purpose more clear
- Use the _cb suffix to align with naming used for callbacks in other
  areas.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-14 07:55:55 -04:00
Gerard Marull-Paretas
3ca6d9503c pm: move control callback to pm_device
Move PM specific callback to the pm_device structure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-14 07:55:55 -04:00
Evgeniy Paltsev
a7d07cb62c ARC: forbid FIRQ or multiple register banks w/ 1 IRQ priority level
Don't allow to enable multiple register banks / fast
interrupts if we have only one interrupt priority level.

NOTE: we duplicate some checks by adding dependencies to ARC
Kconfig and adding build-time checks in C code. We do it
intentionally as for some reason we can violate dependencies
in architecture-level Kconfig by adding incorrect default in
SoC-level Kconfig. Such violation happens without any
warnings / errors from the Kconfig.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-13 20:41:29 -04:00
Evgeniy Paltsev
db5f707261 ARC: MWDT: drop LOG2CEIL macro as it's defined now for all toolchains
LOG2CEIL is defined now for all tolchains in
include/toolchain/common.h
so let's drop it's definition for MWDT toolchain in
include/linker/linker-tool-mwdt.h

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
2021-10-13 17:44:51 -04:00
Robert Lubos
875c75c4f9 net: lwm2m: Replace float32_value_t with double
Replace the custom float32_value_t LwM2M type with native double, to
facilitate LwM2M API and improve floating point precission.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-10-13 10:13:32 -04:00
Keith Short
93f665e619 net: if: Fix parameter in NET_DEVICE_DT_DEFINE_INSTANCE
The NET_DEVICE_DT_DEFINE_INSTANCE() macro was passing an invalid
dev_name to Z_NET_DEVICE_INIT_INSTANCE(). Change this parameter to get
device name based on the node_id, matching other macros.

Signed-off-by: Keith Short <keithshort@google.com>
2021-10-13 06:23:28 -04:00
Robert Lubos
4e9b9a7fdf drivers: net: loopback: Register loopback IP address to the interface
Regsiter loopback IPv4/IPv6 to the loopback interface during
interface initialization.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2021-10-13 11:17:51 +02:00
Siew Chin Lim
0c34373720 drivers: clock_control: Add clock driver for Intel SoC FPGA Agilex
Add clock driver for Intel SoC FPGA Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-10-12 08:37:03 -04:00