Move to use DEVICE_DT_GET instead of device_get_binding as we
work on phasing out use of DTS 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move to use DEVICE_DT_GET instead of device_get_binding as we
work on phasing out use of DTS 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move to use DEVICE_DT_GET instead of device_get_binding as we
work on phasing out use of DTS 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
Running the testcase dac loopback on the nucleo_g071rb
target board.
The ADC1 in0 on PA0 (pin A0), the DAC1 out1 on PA4 (pin A2)
must be connected on the HW.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds a test case that configures an alternative clock source
for an ADC peripheral.
In case no alt clock is available, only the gating clock is enabled
and disabled.
Unlike the i2c and lptim test, the actual gating clock frequency is
not checked, because for the adc there seems to be no uniform way
to retrieve the frequency via the hal.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
For the STM32G0, STM32G4, and STM32WL enable the adc node in one
configuration, and select the PLL_P output as its clock source.
PLL_P divider is chosen to be 20 to make sure it's a unique frequency.
- g0, and g4 have pll as sysclk
- wl has hse as sysclock
The test configurations and the overlay-files are renamed accordingly.
All overlays that don't specify an alternative clock source still
make sure that the adc node is "okay" to be able to perform basic test.
The basic test only turns on and off the gate clock without checking the
frequency.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The test checks if the peripheral gating clock was correctly disabled
after the test, but accidentally the I2C_CLK was checked instead of the
LPTIM_CLK.
This commit fixes this by using __HAL_RCC_LPTIM1_IS_CLK_ENABLED instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The nucleo_wl55jc according to the datasheet does have a
NT2016SF-32M-END5875A 32MHz TCXO as HSE, therefore needs
enable the "hse-tcxo;" property to work, this was not the case
for the clock_configuration/stm32_common_devices test cases.
Additionally, remove the comment about about ST-Link clock,
because the source is the tcxo and not the ST-Link.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
uart_async test and spi_loopback test require UART and SPI
with an ASYNC option.
The SAM0 UART/SPI driver requires configuring DMA support.
Arduino MKRZero is not DMA configured like other SAM0 boards.
We exclude it from the tests.
ea36f9b and f4c5bdf already exclude other SAM0 boards from these tests.
Arduino MKRZero also followed these PR policies.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Changes:
- Copied over board files for blackpill_f401ce
- Changed appropriate soc dtsi from stm32f401Xe.dtsi to stm32f401Xc.dtsi
- Replaced any instance of F401CE to F401CC
- Added blackpill_401cc to adc test
In essense the blackpill_f401ce and blackpill_f401cc are the exact
same boards,
the f401cc variant of the stm32 mcu has lesser sram and flash than
the f401ce.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Add disk performance test, to report performance of disk devices. This
test reports performance for single sector R/W, sequential read/writes,
and an IOPS score based on random 512 byte reads and writes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rename disk driver test to disk_access, as multiple disk tests exist.
Disk access test is intended to verify disk functionality.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
As Zephyr currently requires CMake version 3.20.0, update all
occurrences of cmake_minimum_required.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Some drivers may not support simultaneous input-output
configuration or disconnect.
In such cases, the driver should return `-ENOTSUP` and the
test should be skipped.
Fixes#46917
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
Update test suite to leverage new ZTEST APIs.
TEST=twister -T tests/drivers/watchdog/wdt_basic_api # Only build
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The test_adc.c still have hardcoded information on a board basis,
that need to be added manually.
Signed-off-by: Steffen Jahnke <steffen.jahnke@eu.panasonic.com>
STM32_DT_CLOCKS was designed to take a device tree node label name as
argument: STM32_DT_CLOCKS(uart1)
Change its implementation to take a node identifier instead:
STM32_DT_CLOCKS(DT_NODELABEL(uart1)).
This make its usage more flexible since the argument can now be extracted
from other DT macros such as DT_PARENT. Then, the following can be done:
STM32_DT_CLOCKS(DT_PARENT(child_node_label)).
Since it is now possible implement STM32_DT_INST_CLOCKS using
STM32_DT_CLOCKS.
Finally, update existing STM32_DT_CLOCKS users and convert
STM32_INST_CLOCK_INFO users to STM32_CLOCK_INFO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Simple driver that allows one to choose the clock speed of xtensa cores.
It's basically a shim layer on top of SOC level driver.
Also, a really simple test case was added, mainly to ensure things are
build and are sane.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Enable testcases under tests/drivers/gpio/gpio_basic_api
To run in twister, "-X gpio_loopback" parameter is needed.
Signed-off-by: Yinfang Wang <yinfang.wang@intel.com>
- The MX25UM51345G flash is connected to FLEXSPI PortA for
mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Add watchdog support to the mimxrt595 platform.
The mimxrt595 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt595 does not retain this memory through a
reset.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Enable access to the HS_SPI pins(JP26) on the mimxrt595_evk board.
Using DMA mode, tested with spi_loopback testcase.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
The reserved memory mechanism (sections and regions definition) has been
entirely replaced, greatly extended and made it better by the work done
on the zephyr,memory-region compatible.
Since there is are no actual users, we can remove it.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Enable testcases under tests/drivers/gpio/gpio_basic_api
To run in twister, "-X gpio_loopback" parameter is needed
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
A test is added that uses the new device and verifies that all
desired memory is included in the core dump when a crash occurs.
Signed-off-by: Mark Holden <mholden@fb.com>
As the SPI_SLAVE define is used by some HAL (e.g. the gigadevice HAL),
SPI_SLAVE has been renamed to SPI_SLAVE_NUMBER.
Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@rtone.fr>
This PR adds support for the RT1060_EVKB as a variant of the RT1060 EVK.
Blinky app tested locally on RT1060_EVKB.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
This commit adds support for EBYTE E73-TBB.
This board features Nordic nRF52832 chip.
It was tested with several samples such as blinky and buttons.
Signed-off-by: Michal morsisko <morsisko@gmail.com>
The initialized test buffers tx_data and tx2_data were not given a
specific size, but were initialized with one more byte than the
uninitialized buffers they get copied to. As a result, the memcpy found
a buffer overflow. Fix this by setting the source buffer sizes to match
the destination.
Signed-off-by: Keith Packard <keithp@keithp.com>
This sets the dts of dma for using the uart 6 asynch api.
The stm32f746 has a dma V1 with request 5 for Tx/Rx usart6
The Tx&Rx pins (PG14, PG9) of the usart6 are connected
on the nucleo_f746zg board to pass the test
The CONFIG_DCACHE=n must also be set to disable Dcache.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This sets the dts of dma for using the uart 6 asynch api.
The stm32f767 has a dma V1 with request 5 for Tx/Rx usart6
The Tx&Rx pins (PG14, PG9) of the usart6 are connected
on the nucleo_f767zi board to pass the test
The CONFIG_DCACHE=n must also be set to disable Dcache.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Update the new API to use K_USER as the flags for both
CONFIG_USERSPACE and CONFIG_TEST_USERSPACE. Also, fix the linker
script to properly include the suites, tests, and rules.
Fixes#44108
Signed-off-by: Yuval Peress <peress@google.com>
Configure the testcase.yaml to execute watchdog testcase
wdt_basic_api on each IWDG and WWDG on all the stm32 boards
With two generic stm32 .overlay files as extra config :
one wdg is tested when the other is disabled.
Removing from board overlay.
Giving the list of boards else non-stm32 ones could try building
Signed-off-by: Francois Ramu <francois.ramu@st.com>
As now the CONFIG_NOCACHE_MEMORY is not responsible for controlling the
data cache on STM32H7 SoC, the CONFIG_DCACHE=n must be set explicitly
to preserve previous behavior as UART driver is not using no-cache
buffers.
Considering the above comment, the CONFIG_NOCACHE_MEMORY can be safely
removed.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Skip the test_multiple_alarms() test when the settop value is
not supported. This is to avoid the case where wrap around
take a long time thereby causing test failures
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
