Commit Graph

432 Commits

Author SHA1 Message Date
Carlo Caione
3aef85458d arch: arm64: Dump registers content on fatal error
Extend the ESF structure and dump the most important registers in the
error exception handler.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione
1be0c05311 arch: arm64: Introduce ARM64 (AArch64) architecture
Introduce the basic ARM64 architecture support.

A new CONFIG_ARM64 symbol is introduced for the new architecture and new
cmake / Kconfig files are added to switch between ARM and ARM64.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Ulf Magnusson
1b394ad153 soc: ti_simplelink: kconfig: Refactor CCFG flash block handling
Instead of having TI_CCFG_PRESENT as a symbol that's only defined in
soc/arm/ti_simplelink/cc13x2_cc26x2/Kconfig.defconfig.series and y when
SOC_SERIES_CC13X2_CC26X2 is enabled, turn it into a helper symbol that's
selected by SOC_SERIES_CC13X2_CC26X2.

This avoids having a symbol that's only defined in a Kconfig.defconfig
file, which is confusing. It also makes things a bit more generic, in
case other boards with CCFGs are added.

Also rename it to HAS_TI_CCFG to be consistent with other helper
symbols, and add a help text.

Flagged by scripts/kconfig/lint.py.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-29 09:41:46 -06:00
Øyvind Rønningstad
05f0d85b6a extensions.cmake: Replace TEXT_START with ROM_START
In zephyr_linker_sources().
This is done since the point of the location is to place things at given
offsets. This can only be done consistenly if the linker code is placed
into the _first_ section.

All uses of TEXT_START are replaced with ROM_START.

ROM_START is only supported in some arches, as some arches have several
custom sections before text. These don't currently have ROM_START or
TEXT_START available, but that could be added with a bit of refactoring
in their linker script.

No SORT_KEYs are changed.

This also fixes an error introduced when TEXT_START was added, where
TEXT_SECTION_OFFSET was applied to riscv's common linker.ld instead of
to openisa_rv32m1's specific linker.ld.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ioannis Glaropoulos
e94551e2b7 arch: arm: cortex-m: properly name ROM sections in the linker
This commit does the following:
- renames the 'text' ROM section to 'rom_start', to reflect
  that this section is the first section of the image.
- renames the 'TEXT_SECTION_NAME_2' section to 'text', since
  that section (whose start is pointed by _image_text_start)
  holds the entire image text section.

The commit removes the confusion by having multiple ROM sections
named as 'text' in ARM Cortex-M builds.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ioannis Glaropoulos
29d88c6c73 arch: arm: cortex-m: linker.ld: do not indent preprocessor directives
We should not use indentation for pre-processor directives.
This commit fixes the indentation in the ARM Cortex-M linker
script.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-23 03:22:59 -08:00
Ulf Magnusson
4e85006ba4 dts: Rename generated_dts_board*.{h,conf} to devicetree*.{h,conf}
generated_dts_board.h is pretty redundant and confusing as a name. Call
it devicetree.h instead.

dts.h would be another option, but DTS stands for "devicetree source"
and is the source code format, so it's a bit confusing too.

The replacement was done by grepping for 'generated_dts_board' and
'GENERATED_DTS_BOARD'.

Two build diagram and input-output SVG files were updated as well, along
with misc. documentation.

hal_ti, mcuboot, and ci-tools updates are included too, in the west.yml
update.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-17 17:57:59 +01:00
Stephanos Ioannidis
bc8524eb82 arch: arm: Rewrite Cortex-R reset vector function.
This commit addresses the following issues:

1. Add a new Kconfig configuration for specifying Dual-redundant Core
   Lock-step (DCLS) processor topology.

2. Register initialisation is only required when Dual-redundant Core
   Lock-step (DCLS) is implemented in hardware. This initialisation is
   required on DCLS only because the architectural registers are in an
   indeterminate state after reset and therefore the initial register
   state of the two parallel executing cores are not guaranteed to be
   identical, which can lead to DCCM detecting it as a hardware fault.
   A conditional compilation check for this hardware configuration
   using the newly added CONFIG_CPU_HAS_DCLS flag has been added.

3. The existing CPU register initialisation code did not take into
   account the banked registers for every execution mode. The new
   implementation ensures that all architectural registers of every
   mode are initialised.

4. Add VFP register initialisation for when floating-point support is
   enabled and the core is configured in DCLS topology. This
   initialisation sequence is required for the same reason given in
   the first issue.

5. Add provision for platform-specific initialisation on Cortex-R
   using PLATFORM_SPECIFIC_INIT config and z_platform_init function.

6. Remove seemingly pointless and inadequately defined STACK_MARGIN.
   Not only does it violate the 8-byte stack alignment rule, it does
   not provide any form of real stack protection.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-10 10:34:17 +01:00
Ioannis Glaropoulos
a07cb30d18 arch: arm: cortex-m: implement support for dynamic direct interrupts
This commits implements the support for dynamic direct
interrupts for the ARM Cortex-M architecture, and exposes
the support to the user as an ARM-only API.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-08 10:15:09 -08:00
Carlo Caione
d048faacf2 aarch32: Add header shims to support old file locations
Out-of-tree code can still be using the old file locations. Introduce
header shims to include the headers from the new correct location and
print a warning message.

Add also a new Kconfig symbol to suppress such warning.

The shim will go away after two releases, so make sure to adapt your
application for the new locations.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Carlo Caione
13e671e381 arch: arm: Fix header guards
Fix the header guards for the ARM header files to reflect the new code
location.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Carlo Caione
aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Øyvind Rønningstad
0b2c8e201c arm, x86, riscv: linker.ld: Move TEXT_SECTION_OFFSET
to its own linker file snippet so snippets can be placed before it.
Using zephyr_linker_sources().

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
1134f1b49d cortex_m: linker.ld: Port secure entry funcs to zephyr_linker_sources()
Place in its own linker snippet file.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
b1026da300 arm: linker.ld: Port the CC32xx flash header to zephyr_linker_sources()
Add the .dbghdr sections via its own linker script snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
54c1af861c arm: linker.ld: Port NXP_IMX_RT_BOOT_HEADER to zephyr_linker_sources()
Add the .boot_hdr.* sections via its own linker script snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
f5fda5cfa1 arm: linker.ld: Port KINETIS_FLASH_CONFIG to zephyr_linker_sources()
Add the .kinetis_flash_config via its own linker script snippet.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
321462b310 arm: linker.ld: Port the vector table to zephyr_linker_sources()
Also port vector table relay.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
Øyvind Rønningstad
d1c2a4edbf cmake: Add the TEXT_START location to zephyr_linker_sources()
Places linker code at or near the beginning of the text section.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-12-20 08:54:53 -05:00
David B. Kinder
38914679f2 doc: fix ordered lists in doxygen comments
doxygen does not support ordered (numbered) lists using reST syntax
``1)`` or ``a)`` unless the doxygen comments are bounded by ``@rst`` and
``@endrst`` markers.  The "doxygen" way to do ordered lists is to use
``-#``.  This PR cleans this up for our API documentation.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-11-20 17:46:35 -05:00
Ioannis Glaropoulos
e33ae1d613 arch: arm: userspace: add ip to clobber list in arch_syscall_invokeX
We should be adding a compiler barrier for IP register
when we are doing syscall generation on Cortex-M
architecture. The syscall generation itself only
does an SVC trigger; the execution returns to thread
mode and ARM does not guarantee that IP register is
preserved, when we finally get back to the point where
the syscall was invoked. This may be a problem, when
the compiler inlines the arch_syscall_invoke function,
so the IP register may be in use.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-11-18 18:01:03 -06:00
Kumar Gala
e9d0f1812b arch/arm: Fix gcc-9.2 warning with z_arch_syscall_invoke6
Fix the following warning from gcc-9.2:

arm/syscall.h:52:2: error: listing the stack pointer register 'sp'
 in a clobber list is deprecated [-Werror=deprecated]
   52 |  __asm__ volatile("svc %[svid]\n"
      |  ^~~~~~~

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-18 18:01:03 -06:00
Stephanos Ioannidis
5ba0c8e0c5 arch: arm: Inline arch_isr_direct_header.
This commit inlines arch_isr_direct_header function that was previously
placed in irq_manage.c for no good reason (possibly in relation to the
FIXME for #3056).

In addition, since the PR #20119 resolved the header circular
dependency issue described in the issue #3056, this commit removes the
references to it in the code.

The reason for not inlining _arch_is_direct_pm as the #3056 FIXME
suggests is that there is little to gain from doing so and there still
exists circular dependency for the headers required by this function
(#20119 only addresses kernel_structs.h, which is required for _current
and _kernel, which, in turn, is required for handling interrupt nesting
in many architectures; in fact, Cortex-A and Cortex-R port will require
it as well).

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-08 12:23:05 +01:00
Andrew Boie
4f77c2ad53 kernel: rename z_arch_ to arch_
Promote the private z_arch_* namespace, which specifies
the interface between the core kernel and the
architecture code, to a new top-level namespace named
arch_*.

This allows our documentation generation to create
online documentation for this set of interfaces,
and this set of interfaces is worth treating in a
more formal way anyway.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Andrew Boie
a6de79b4af arm: remove unused header
This had two functions in it, neither were implemented
anywhere.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-07 15:21:46 -08:00
Stephanos Ioannidis
2d7460482d headers: Refactor kernel and arch headers.
This commit refactors kernel and arch headers to establish a boundary
between private and public interface headers.

The refactoring strategy used in this commit is detailed in the issue

This commit introduces the following major changes:

1. Establish a clear boundary between private and public headers by
  removing "kernel/include" and "arch/*/include" from the global
  include paths. Ideally, only kernel/ and arch/*/ source files should
  reference the headers in these directories. If these headers must be
  used by a component, these include paths shall be manually added to
  the CMakeLists.txt file of the component. This is intended to
  discourage applications from including private kernel and arch
  headers either knowingly and unknowingly.

  - kernel/include/ (PRIVATE)
    This directory contains the private headers that provide private
   kernel definitions which should not be visible outside the kernel
   and arch source code. All public kernel definitions must be added
   to an appropriate header located under include/.

  - arch/*/include/ (PRIVATE)
    This directory contains the private headers that provide private
   architecture-specific definitions which should not be visible
   outside the arch and kernel source code. All public architecture-
   specific definitions must be added to an appropriate header located
   under include/arch/*/.

  - include/ AND include/sys/ (PUBLIC)
    This directory contains the public headers that provide public
   kernel definitions which can be referenced by both kernel and
   application code.

  - include/arch/*/ (PUBLIC)
    This directory contains the public headers that provide public
   architecture-specific definitions which can be referenced by both
   kernel and application code.

2. Split arch_interface.h into "kernel-to-arch interface" and "public
  arch interface" divisions.

  - kernel/include/kernel_arch_interface.h
    * provides private "kernel-to-arch interface" definition.
    * includes arch/*/include/kernel_arch_func.h to ensure that the
     interface function implementations are always available.
    * includes sys/arch_interface.h so that public arch interface
     definitions are automatically included when including this file.

  - arch/*/include/kernel_arch_func.h
    * provides architecture-specific "kernel-to-arch interface"
     implementation.
    * only the functions that will be used in kernel and arch source
     files are defined here.

  - include/sys/arch_interface.h
    * provides "public arch interface" definition.
    * includes include/arch/arch_inlines.h to ensure that the
     architecture-specific public inline interface function
     implementations are always available.

  - include/arch/arch_inlines.h
    * includes architecture-specific arch_inlines.h in
     include/arch/*/arch_inline.h.

  - include/arch/*/arch_inline.h
    * provides architecture-specific "public arch interface" inline
     function implementation.
    * supersedes include/sys/arch_inline.h.

3. Refactor kernel and the existing architecture implementations.

  - Remove circular dependency of kernel and arch headers. The
   following general rules should be observed:

    * Never include any private headers from public headers
    * Never include kernel_internal.h in kernel_arch_data.h
    * Always include kernel_arch_data.h from kernel_arch_func.h
    * Never include kernel.h from kernel_struct.h either directly or
     indirectly. Only add the kernel structures that must be referenced
     from public arch headers in this file.

  - Relocate syscall_handler.h to include/ so it can be used in the
   public code. This is necessary because many user-mode public codes
   reference the functions defined in this header.

  - Relocate kernel_arch_thread.h to include/arch/*/thread.h. This is
   necessary to provide architecture-specific thread definition for
   'struct k_thread' in kernel.h.

  - Remove any private header dependencies from public headers using
   the following methods:

    * If dependency is not required, simply omit
    * If dependency is required,
      - Relocate a portion of the required dependencies from the
       private header to an appropriate public header OR
      - Relocate the required private header to make it public.

This commit supersedes #20047, addresses #19666, and fixes #3056.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2019-11-06 16:07:32 -08:00
Andrew Boie
800b35f598 kernel: use uintptr_t for syscall arguments
We need to pass system call args using a register-width
data type and not hard-code this to u32_t.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-11-06 09:04:16 -08:00
Peter Robinson
ccd40d5502 linker: arm: discard .note.GNU-stack
Similar to what was required for x86 in #12719 / PR#12752

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
2019-11-04 09:10:19 -05:00
Kumar Gala
00c7ce7942 linker: move where we define _LINKER and _ASMLANGUAGE
Move _LINKER and _ASMLANGUAGE to target.cmake because of how we pick the
linker script that might be used.  This way regardless of how or where a
linker.ld gets included we will always set _LINKER & _ASMLANGUAGE (so
any header that needs check based on those defines they can,
specifically generated_dts_board.h)

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-11-03 12:55:16 +01:00
Ioannis Glaropoulos
bb41d56ced arch: arm: do not add CODE_UNREACHABLE in Z_ARCH_EXCEPT
For ARM, Z_ARCH_EXCEPT triggers an SVC to induce a system error.
This code block may be inlined, so, if we want to return from
this error DIRECTLY to thread mode, e.g. if the system error
occurred in ISR context and we are not aborting the current
thread, we must instruct the compiler that the execution
may continue after the inlined SVC. Therefore, we must remove
the CODE_UNREACHABLE statements.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-24 10:12:08 -07:00
Ioannis Glaropoulos
684f5ec12e arch: arm: userspace: add ip and sp to clobber
We should be adding a compiler barrier for IP and SP
registers when we are doing syscall generation on
ARMv6-M architecture. The syscall generation itself
only does an SVC trigger; the execution returns to
thread mode and ARM does not guarantee that IP
register is preserved, when we finally get back to
the point where the syscall was invoked. The SP
also needs to be preserved for syscalls returning
64-bit results. In that case the r0 may hold a
pointer to the stack where the 64-bit result was
pushed, That is, the stack pointer may have been
changed due to the syscall, and C code needs to
know that.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-18 14:20:32 -05:00
Ioannis Glaropoulos
c86073cf6b arch: arm: error: fix ARMv6-M assembly for Z_ARCH_EXCEPT
As we are allowed to pass any integer value as as software
fatal exception reason, we need to fix the inline assembly
for ARMv6-M, to accept large immediate offsets. We do this
by changing the way we write the exception reason to R0.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-10-16 11:22:48 +02:00
Andrew Boie
8ffff144ea kernel: add architecture interface headers
include/sys/arch_inlines.h will contain all architecture APIs
that are used by public inline functions and macros,
with implementations deriving from include/arch/cpu.h.

kernel/include/arch_interface.h will contain everything
else, with implementations deriving from
arch/*/include/kernel_arch_func.h.

Instances of duplicate documentation for these APIs have been
removed; implementation details have been left in place.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-11 13:30:46 -07:00
Andrew Boie
3ffb89ad7f arches: fix z_arch_k_cycle_get_32() definitions
These need to all be inline functions and not macros.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-09 09:14:18 -04:00
Andrew Boie
8c98a97581 arm: arch code naming cleanup
This patch re-namespaces global variables and functions
that are used only within the arch/arm/ code to be
prefixed with z_arm_.

Some instances of CamelCase have been corrected.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-10-04 10:46:23 +02:00
Andrew Boie
07525a3d54 kernel: add arch interface for idle functions
k_cpu_idle() and k_cpu_atomic_idle() were being directly
implemented by arch code.

Rename these implementations to z_arch_cpu_idle() and
z_arch_cpu_atomic_idle(), and call them from new inline
function definitions in kernel.h.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-30 15:25:55 -04:00
Andrew Boie
845aa6d114 kernel: renamespace arch_nop()
This is part of the core kernel -> architecture interface
and has been renamed to z_arch_nop().

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-30 15:25:55 -04:00
Mrinal Sen
1246cb8cef debug: tracing: Remove unneeded abstraction
Various C and Assembly modules
make function calls to z_sys_trace_*. These merely call
corresponding functions sys_trace_*. This commit
is to simplify these by making direct function calls
to the sys_trace_* functions from these modules.
Subsequently, the z_sys_trace_* functions are removed.

Signed-off-by: Mrinal Sen <msen@oticon.com>
2019-09-26 06:26:22 -04:00
Ioannis Glaropoulos
48fa076a56 arch: arm: userspace: minor refactor in z_arch_is_user_context
Refactor z_arch_is_user_context() for ARM, so it uses
the CMSIS CONTROL_nPRIV_Msk instead of hard-coded 0x1.
Fixing also some typos in include/arch/arm/syscall.h.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-09-23 18:02:00 -07:00
Wentong Wu
da31c81737 linker: add custom align size to reduce alignment memory wasting
when enable CONFIG_CUSTOM_SECTION_ALIGN, it need less alignment
memory for image rom region. But that needs carefully configure
MPU region and sub-regions(ARMv7-M) to cover this feature.

Fixes: #17337.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-09-19 21:38:31 -04:00
Jan Van Winkel
ff36fc7d67 linker: cxx: Include .gcc_except_table sections
Include .gcc_except_table (sub-)sections in linker files to support C++
with exceptions enabled. If these sections are not mapped warnings will
be generated for orphaned sections at link time.

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-09-19 09:26:42 -05:00
Maureen Helm
2bc700f66e soc: nxp_kinetis: Make kinetis flash configuration field configurable
Kinetis SoCs have a 16-byte flash configuration field that must be
loaded at a specific address in flash. This field is not needed if we
are building an image to be chainloaded by MCUboot or a RAM-only image,
so we can exlude it in these cases and recover some wasted flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-09-13 13:58:46 -05:00
Vincent Wan
3b63b92539 linker: place debug header section for CC3235SF
The CC3235SF requires a debug header to be placed at the beginning of
internal flash, so that the bootloader does not automatically overwrite
the flash memory with the program saved in external flash.

Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
2019-09-10 10:22:30 +03:00
Peter Bigot
ce3f07954a arch/arm: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

In arch.h the extern "C" in the including context is left active during
include of target-specific mpu headers to avoid more complex
restructuring.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Bradley Bolen
eb9515ab9c arch: arm: cortex_r: Add memory barriers for register accesses
Cortex R has a write buffer that can cause reordering problems when
accessing memory mapped registers.  Use memory barries to make sure that
these accesses are performed in the desired order.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
c30a71df95 arch: arm: Add Cortex-R support
This adds initial Cortex-R support for interrupts and context switching.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-09 22:50:50 +02:00
Bradley Bolen
1514c41cd1 arch: arm: Move Cortex-M specific CPU defines
These defines are specific to the Cortex-M.  Move them to their own
header file to prepare for Cortex-R support.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-02 23:37:03 +03:00
Bradley Bolen
4cee0eecdc arch: arm: Move header files to common location
These files will be used for Cortex-R support as well.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
2019-08-02 23:37:03 +03:00
Andrei Gansari
11d8f1a1e9 soc: k64f MPU configured to always allow USB
Because NXP MPU's regions are dynamically enabled/disabled, USB
device's access maybe restricted when switching out of a task.
Background DMA transfers to/from RAM may happen during MPU region
reconfiguration or core idling.
Enabled USB (Kinetis MPU Master 4) to always have access to RAM address
space.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2019-07-30 13:08:43 +03:00
Andrew Boie
96571a8c40 kernel: rename NANO_ESF
This is now called z_arch_esf_t, conforming to our naming
convention.

This needs to remain a typedef due to how our offset generation
header mechanism works.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00