Reintroduce the overlays for native_sim/native/64 and
native_posix/native/64 to verify all bitrates on those platforms.
These were removed in fddbd79cf7.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
RAM disk access is always enabled on qemu_x86_64, so checking for it first
means that NVMe is never selected.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
There are several esp32-based boards that its conf and overlay
files are missing proper renaming to match cpu cluster.
This also removes all _SOC_ name from files.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
UART error may be reported with random timing
from either UART in configuration mismatch case.
The test case is now aligned to such behaviour.
Signed-off-by: Bartosz Miller <bartosz.miller@nordicsemi.no>
The commit sets CONFIG_SOC_NRF_FLASH=n for SPI/QSPI Flash tests
as building internal Flash driver is not needed in these
scenarios.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Some configurations which are not valid for nrf54l15. Mainly those
which are using ENHANCED_POLL_OUT option which is not applicable for
nrf54l15 because it has ENDTX_STOPTX short so PPI connection is not
needed.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Modifying arbitrary delay to cover for receivers with timeout.
Adding a delay between polling and asynchronous checking to cover
for cases when CPU processing is fast enough so that both checks
may overlap.
Allow error code for uart_rx_disable call.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
PM action shall be called from the thread context thus switching to
k_work instead of the k_timer.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
FTM internal counter can be clocked by one of three clock sources
independent of the module bus clock. This patch introduces a DT property
to perform the clock selection from DT.
DT sources are updated to keep the current clock selection for all boards,
with exception of ucans32k1sic board which is migrated to use system
clock by default, as this seems to be a better choice for most cases.
Some PWM LED samples require slower clock so overlays are added for
those cases.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
GRTC peripheral is present on nRF54H20,
so the tests should be executed on this target as well.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Add overlay for nrf52_bsim to the fixed_top test.
For bsim board RTC register address has to be translated.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
During the hwmv1->v2 transition, overlays from a base
board were made to be shared with the variants.
So at that time all overlays for variants which were
just copies of the base overlay were removed.
After that in
https://github.com/zephyrproject-rtos/zephyr/pull/71149
this shared/merged overlay behaviour was reverted,
but not all tests were fixed.
This is one of those. Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
During the hwmv1->v2 transition, overlays from a base
board were made to be shared with the variants.
So at that time all overlays for variants which were
just copies of the base overlay were removed.
After that in
https://github.com/zephyrproject-rtos/zephyr/pull/71149
this shared/merged overlay behaviour was reverted,
but not all tests were fixed.
This is one of those. Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
During the hwmv1->v2 transition, overlays from a base
board were made to be shared with the variants.
So at that time all overlays for variants which were
just copies of the base overlay were removed.
After that in
https://github.com/zephyrproject-rtos/zephyr/pull/71149
this shared/merged overlay behaviour was reverted,
but not all tests were fixed.
This is one of those. Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
During the hwmv1->v2 transition, overlays from a base
board were made to be shared with the variants.
So at that time all overlays for variants which were
just copies of the base overlay were removed.
After that in
https://github.com/zephyrproject-rtos/zephyr/pull/71149
this shared/merged overlay behaviour was reverted,
but not all tests were fixed.
This is one of those. Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
During the hwmv1->v2 transition, overlays from a base
board were made to be shared with the variants.
So at that time all overlays for variants which were
just copies of the base overlay were removed.
After that in
https://github.com/zephyrproject-rtos/zephyr/pull/71149
this shared/merged overlay behaviour was reverted,
but not all tests were fixed.
This is one of those. Let's fix it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Adds a DAC driver for Texas Instruments DACx0501 family of devices
Signed-off-by: Eran Gal <erang@google.com>
Co-authored-by: Martin Jäger <17674105+martinjaeger@users.noreply.github.com>
This sets up a backing device, creates a FAT file system, then opens a file
as a loopback device and runs the disk_access tests on that.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add nRF54L15 to platform_allow in the sample.yaml:
- clock_control_api,
- nrf_clock_calibration,
- nrf_lf_clock_start,
- onoff.
Signed-off-by: Sebastian Głąb <sebastian.glab@nordicsemi.no>
Since the minimum/maximum supported bitrates are now stored in the common
CAN controller driver configuration struct, retrieving these can no longer
fail.
Add new CAN controller API functions can_get_bitrate_min() and
can_get_bitrate_max() reflecting this and deprecate the existing
can_get_min_bitrate() and can_get_max_bitrate().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Previously the logic was inverted for error_callback_en where 0 was
enablement and 1 was disable. This was likely done so that the default,
sensibly so, was to enable the error callback if possible. A variety of
in tree users had confused the enable/disable value.
Change the name of the flag to error_callback_dis where the default
remains 0 (do not disable the callback!) and correct in tree uses of the
flag where it seemed incorrect.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add test which is using one SPI master and one SPI slave instance.
There is already a loopback test for SPI master so this test is
focusing on SPI slave API. Test requires 4 pairs of GPIO pins
shortened together. One set of pins is used by SPI master and
one for SPI slave.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
