Add the inclusion of the Common Peripheral Access Layer for aarch32
Cortex-A SoCs in combination with the respective SoC's header file,
in which the feature flags evaluated in core_ca.h must be provided.
The corresponding CMSIS include path is added to the build by setting
the HAS_CMSIS_CORE_A Kconfig item for all aarch32 Cortex-A CPUs.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
Introduce support for On-Chip Memory (OCM) areas in aarch32 Cortex-A
SoCs. This memory area is suitable for, amongst other things, un-
cached device DMA. The OCM memory can reside either at address zero
or at a high memory address, with configuration of the memory's lo-
cation similar to the configuration of the location of the exception
vectors. In both cases, it must be assured that the low/high OCM
area declaration doesn't overlap with the exception vectors memory
page at either the low/high address. Therefore, all possible OCM
location options shall be described in the SoC's device tree, the
current location shall be indicated via a "chosen" entry in the
target board's device tree.
This commit contains the necessary changes to the linker-related
files as well as the static region declaration for the MMU in-
itialization in the Zynq-7000 SoC-specific init code.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add support for the Xilinx Zynq-7000 SoC family to this driver. This
includes some SoC-specific register accesses when setting an updated
TX clock divider, also, the device tree binding now supports higher
MDC clock divisor values when the current target SoC is a Zynq rather
than a ZynqMP.
With regards to the use of this driver in a QEMU simulation of the
Zynq-7000, the Kconfig file is modified so that the driver is not
enabled unless QEMU networking is set to Ethernet mode.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Modification of the ARM architected timer driver and its configuration
data in order to address an erratum which exists at least in the Cor-
tex-A9 CPU, and which can also be observed in the QEMU implementation
of the Cortex-A9.
Comp.: ARM Cortex-A9 processors Software Developer Errata Notice
ARM document ID032315
Erratum 740657
This erratum causes a spurious interrupt pending indication with the
interrupt controller if no new compare value is written within the
timer ISR before the interrupt is cleared. This is usually the case
in tickless mode. If the spurious interrupt is not prevented, the
timer ISR will be called twice, but on second execution, the pending
flag is not set within the timer's register space. Not handling this
issue will lead to erratic tick announcements to the kernel.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Modify #ifdefs so that any code that is compiled if CONFIG_ARMV7_R is
set is also compiled if CONFIG_ARMV7_A is set.
Modify #ifdefs so that any code that is compiled if CONFIG_CPU_CORTEX_R
is set is also compiled if CONFIG_CPU_AARCH32_CORTEX_A is set.
Modify source dir inclusion in CMakeLists.txt accordingly.
Brief file descriptions have been updated to include Cortex-A whereever
only Cortex-M and Cortex-R were mentioned so far.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
An initial implementation for memory management using the ARMv7 MMU.
A single L1 translation table for the whole 4 GB address space is al-
ways present, a configurable number of L2 page tables are linked to
the L1 table based on the static memory area configuration at boot
time, or whenever arch_mem_map/arch_mem_unmap are called at run-time.
Currently, a CPU with the Multiprocessor Extensions and execution at
PL1 are always assumed. Userspace-related features or thread stack
guard pages are not yet supported. Neither are LPAE, PXN or TEX re-
mapping. All mappings are currently assigned to the same domain. Re-
garding the permissions model, access permissions are specified using
the AP[2:1] model rather than the older AP[2:0] model, which, accor-
ding to ARM's documentation, is deprecated and should no longer be
used. The newer model adds some complexity when it comes to mapping
pages as unaccessible (the AP[2:1] model doesn't support explicit
specification of "no R, no W" permissions, it's always at least "RO"),
this is accomplished by invalidating the ID bits of the respective
page's PTE.
Includes sources, Kconfig integration, adjusted CMakeLists and the
modified linker command file (proper section alignment!).
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
- Hide internal driver API from public documentation
- Use consistent upper-case naming for CAN, RTR, etc.
- Fix indentation of some comments so that they are
rendered with monospace font.
Signed-off-by: Martin Jäger <martin@libre.solar>
This commit adds const modifier in second argument for
sensor trigger handler.
There is no reason to modify this data and this change
would allow to store trigger configuration also in FLASH.
Fixes: #38929
Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
Add a function to update the coap block context from a
packet, according to the block option enum provided.
The existing coap_next_block does not handle block1 transfers
properly because we need to inspect the block1 option
returned by the server. This function is reworked to make use
of the newly introduced one.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.
If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.
This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Those are especially useful with hardware device registers.
They behave the same way as their Linux equivalent, with a much
simpler implementation for now.
Example:
#define REG_FIELD_A GENMASK(6, 0)
#define REG_FIELD_B BIT(7)
#define REG_FIELD_C GENMASK(15, 8)
#define REG_FIELD_D GENMASK(31, 16)
Get:
a = FIELD_GET(REG_FIELD_A, reg);
b = FIELD_GET(REG_FIELD_B, reg);
Set:
reg = FIELD_PREP(REG_FIELD_A, 1) |
FIELD_PREP(REG_FIELD_B, 0) |
FIELD_PREP(REG_FIELD_C, c) |
FIELD_PREP(REG_FIELD_D, 0x40);
Modify:
reg &= ~REG_FIELD_C;
reg |= FIELD_PREP(REG_FIELD_C, c);
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
As discussed in issues/38619, this commit aims to simplify device
power management. It was removed PM_DEVICE_SATE_LOW_POWER.
The power subsystem now doesn't need to figure out which device state to
use of a given system power state. It just suspend and resume devices.
Devices now just need to respond to ACTIVE and SUSPEND and OFF actions
and they are free to use any particular substate they have when the
subsystem asks to suspend. They also don't need to worry about states
transitions (unless they have multiple substates) because the system
will just request them to suspend if they are active and vice-versa.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
rebase
Add a function that can be used by device drivers to know
what will be next power state used by the SoC.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Adds functionality to receive LoRa packets asynchronously. Reception
runs continuously until cancelled by another call to `lora_recv_async`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add RSSI member into gsm_ppp_modem_info structure in order to
get that information using the gsm_ppp_modem_info function.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Make modem_info structure public in order to allow the user
to get modem information using gsm_ppp_modem_info function.
Move modem info query commands into separate function
that's called only once during gsm configuring because
there is no necessity to re-querying modem since
they should not change.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Add support for dynamic pin control, that is, allow to change device pin
configuration at runtime. Because no device de-initialization is
available yet, this API has limited usage options, e.g. modify pin
configuration at early boot stage (before device driver is initialized)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If a certain state has to be skipped, a macro named
Z_PINCTRL_SKIP_<STATE> can be defined evaluating to 1. This can be
useful, for example, to automatically ignore the sleep state if no
device power management is enabled.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Based on on RFC 8132 -
PATCH and FETCH Methods for the Constrained Application Protocol (CoAP)
Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
Based on on RFC 8132 -
PATCH and FETCH Methods for the Constrained Application Protocol (CoAP)
Signed-off-by: Veijo Pesonen <veijo.pesonen@nordicsemi.no>
When generating syscall wrappers, call a tracing macro with the id,
name, and all parameters of the syscall as params when entering and
leaving the syscall. This can be disabled in certain call sites
by defining DISABLE_SYSCALL_TRACING which is useful for certain
tracing implementations which require syscalls themselves to work.
Notably some syscalls *cannot* be automatically traced this way and
headers where exclusions are set are in the gen_syscall.py as notracing.
Includes a systemview and test format implementation.
Tested with systemview, usb, and uart backends with the string
formatter using the tracing sample app.
Debugging the trace wrapper can be aided by setting the TRACE_DIAGNOSTIC
env var and rebuilding from scratch, a warning is issued for every
instance a syscall is traced.
Automatically generating a name mapping for SYSVIEW_Zephyr.txt is a
future item as is documenting how to capture and use the tracing data
generated.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This PR updates GPIO driver to use DTS information
regarding gpio availability.
This also fixes interrupt handling and
also removes kconfig definition for GPIO port.
A few configuration checks were also added to
improve code usage.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
_ARCH_MEM_PARTITION_ALIGN_CHECK was missing for arc mpu v3 and v6.
This commit add the missing macros.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
BUILD_ASSERT macro was disabled for MWDT toolchain from the
moment of adding MWDT support to Zephyr. Built-in _Static_assert
is now working fine for the most of the cases with MWDT toolchain
so we can use it in BUILD_ASSERT.
The only exception is _ARCH_MEM_PARTITION_ALIGN_CHECK macro
as it often used with variable addresses as parameters
which need to be checked at compile time. We disable
_ARCH_MEM_PARTITION_ALIGN_CHECK for MWDT toolchain so we can use
BUILD_ASSERT in other places.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Uses the stats subsys to provide simple but useful debugging stats for
power management state changes and timing.
Removes the no longer needed PM_DEBUG config option
Replaces the use of PM_DEBUG for a test clock output pin for mec1501 and
adds in its place an SoC Kconfig option to enable it.
Adds a STATS_SET macro for assigning a value to a stat group field
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Threads may wait on an event object such that any events posted to
that event object may wake a waiting thread if the posting satisfies
the waiting threads' event conditions.
The configuration option CONFIG_EVENTS is used to control the inclusion
of events in a system as their use increases the size of
'struct k_thread'.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Add __printf_like modifier to validate strings used by shell.
Fixing warnings triggered by this change.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
- Rename to "action" to make its purpose more clear
- Use the _cb suffix to align with naming used for callbacks in other
areas.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Don't allow to enable multiple register banks / fast
interrupts if we have only one interrupt priority level.
NOTE: we duplicate some checks by adding dependencies to ARC
Kconfig and adding build-time checks in C code. We do it
intentionally as for some reason we can violate dependencies
in architecture-level Kconfig by adding incorrect default in
SoC-level Kconfig. Such violation happens without any
warnings / errors from the Kconfig.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
LOG2CEIL is defined now for all tolchains in
include/toolchain/common.h
so let's drop it's definition for MWDT toolchain in
include/linker/linker-tool-mwdt.h
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Replace the custom float32_value_t LwM2M type with native double, to
facilitate LwM2M API and improve floating point precission.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The NET_DEVICE_DT_DEFINE_INSTANCE() macro was passing an invalid
dev_name to Z_NET_DEVICE_INIT_INSTANCE(). Change this parameter to get
device name based on the node_id, matching other macros.
Signed-off-by: Keith Short <keithshort@google.com>
Add new common inline functions sys_set_bits and set_clear_bits to set
and clear multiple bits via bit mask in single function call.
Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
The shared multi-heap memory pool manager uses the multi-heap allocator
to manage a set of reserved memory regions with different capabilities /
attributes (cacheable, non-cacheable, etc...) defined in the DT.
The user can request allocation from the shared pool specifying the
capability / attribute of interest for the memory (cacheable /
non-cacheable memory, etc...)
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
However, there are cases when milliseconds granularity is not
enough and can significantly reduce a throughput, e.g. 1ms is
100 bytes at 1Mb.
Updated 4 drivers which implement asynchronous API. Updated
places where API was used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add macro for representing forever timeout in microseconds.
Macro is similar to already existing SYS_FOREVER_MS.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
On ARM64 platforms, when mapping multiple memory zones with size
not multiple of a L2 block size (2MiB), all the following mappings
will probably use L3 tables.
And a huge mapping will consume all possible L3 tables.
In order to reduce usage of L3 tables, this introduces a new
arch_virt_region_align() optional architecture specific
call to eventually return a more optimal virtual address
alignment than the default MMU_PAGE_SIZE.
This alignment is used in virt_region_alloc() by:
- requesting more pages in virt_region_bitmap to make sure we request
up to the possible aligned virtual address
- freeing the supplementary pages used for alignment
Suggested-by: Nicolas Pitre <npitre@baylibre.com>
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Only one single IPC service backend is currently present: multi_instance
backend. This backend is heavily relying on the RPMsg multi_instance
code to instanciate and manage instances and endpoints. Samples exist
for both in the samples/subsys/ipc/ directory.
With this patch we are "unpacking" the RPMsg multi_service code to make
it more modular and reusable by different backends.
In particular we are re-organizing the code into two helper libraries:
an RPMsg library and a VRING / virtqueues static allocation library. At
the same time we rewrite the multi_instance backend to make fully use of
those new libraries and remove the old multi_instance sample.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Fixes undefined references to sys_port_trace_k_thread_abort_enter()
and sys_port_trace_k_thread_abort_enter().
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
