Commit Graph

14481 Commits

Author SHA1 Message Date
Ben Lauret
9cdc5d38b2 drivers: spi: Add driver for smartbond
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.

Co-authored-by: Stan Geitel <stan@geitel.nl>

Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
2023-04-20 10:32:40 +02:00
Francois Ramu
89636416b5 drivers: flash: stm32 ospi driver defines the dlyb-bypassed property
The delayblock is bypassed when the <dlyb-bypass> property is true.
DT_NODE_HAS_PROP tests whether the property is defined at all,
not whether a boolean property is true or false.
To get a boolean property’s truth value,
use DT_PROP(node_id, prop) instead.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-04-19 17:13:07 +02:00
Gerard Marull-Paretas
09c5f09109 drivers: counter: mcux_qtmr: fix SYS_INIT call signature
Use the new int f(void) SYS_INIT call signature.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 07:18:54 -05:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Tim Lin
bcb173becd tests: drivers: Unit test for it82xx2_evb board
The below is the unit test result for the driver and kernel of
it82xx2_evb board.

GPIO/gpio_basic_api: PASS
I2C/i2c_api: PASS
Flash: PASS
UART/uart_basic_api: PASS
PWM/pwm_api: PASS
WDT/wdt_basic_api: PASS
KSCAN/kscan_api: PASS
kernel/sched/schedule_api: PASS
kernel/sched/preempt: PASS
kernel/timer/timer_api: PASS
kernel/sleep: PASS
ADC/adc_api: PASS.
ADC note: conversion time~=61.6us
          sample time delay~=60us
          wait voltage stable time~=202.8us
Set sampling time to 500us will pass for ADC test.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-19 03:48:38 -04:00
Tim Lin
491e3e6477 ITE: drivers/gpio: Add gpio_ite_it8xxx2_v2 driver
This driver is made for it82xx2 series.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-19 03:48:38 -04:00
Tim Lin
051bd7098a ITE: dts: it82xx2: Add pinctrl node and kscan's pinctrl
Add the pinctrl node that has been remapped in the chip of it82xx2.
And modify kscan's pinctrl for the it82xx2.
And swap I2C default pins.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-19 03:48:38 -04:00
Ruibin Chang
b9a7340ded ITE drivers/interrupt_controller: add intc_ite_it8xxx2_v2 driver
This driver is made for it82xx2 series.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2023-04-19 03:48:38 -04:00
Hiroki Tada
943158326c drivers: sensor: Support Hamamatsu Photonics S11059 Color Sensor
DataSheet:
https://datasheetspdf.com/pdf/1323325/Hamamatsu/S11059-02DT/1

Testing Environment:
esp32

Signed-off-by: Hiroki Tada <tada.hiroki@fujitsu.com>
2023-04-18 17:07:48 -05:00
Daniel DeGrasse
36cc74e7e8 drivers: gpio: gpio_mcux_lpc: add support for module interrupts
On iMX.RT devices, the number of GPIO pins exceeds the maximum of
64 that the PINT interrupt controller can support. Therefore, two
interrupt lines are now shared between the GPIO modules.

This patch allows the user to set the interrupt source for a GPIO
peripheral. For most LPC devices, this will always be the PINT. For some
RT devices, the PINT cannot use pins on GPIO modules other than 0 and 1
as input, and thus the INTA and INTB sources should be used.

Since Zephyr does not support sharing these interrupt between all GPIO
controllers, the user must configure a subset of all GPIO controllers to
use the shared module interrupts. An example of how to do so is provided
for the RT595 EVK.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-04-18 16:14:57 -05:00
Daniel DeGrasse
b8a99a27cc drivers: gpio: gpio_mcux_lpc: remove PINT code
Remove PINT management code from the LPC GPIO driver, as this code is
now contained within the PINT interrupt controller driver, which exposes
an interface to install interrupt callbacks.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-04-18 16:14:57 -05:00
Daniel DeGrasse
6f938f347b drivers: interrupt_controller: introduce PINT driver
Introduce PINT driver, for NXP pin interrupt and pattern match engine.
The driver currently supports only the pin interrupt feature of the
PINT.

Add DTS entires for the PINT on LPC and RT devices that support this
peripheral, and remove the interrupt defintions that are PINT specific
from the GPIO module on these devices.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-04-18 16:14:57 -05:00
Guillaume Gautier
ceebbf8bcf drivers: bluetooth: hci: update macro name after stm32 hal update
Update macro name that changed in latest STM32 HAL update.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-04-18 18:55:26 +02:00
Pierre-Louis Bossart
6d9afd36af drivers: dai: intel: ssp: don't set ACE2.x LCTL::OFLEN
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.

Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
1659aa2e0c intel_adsp: ace20_lnl: Fix i2svss DT field initialization
This patch fixes i2svss field initialisation in Device Tree for LNL
platform. It fixes this bug: #482

Problem is observed only when using SSP_BLOB_VER_1_5 version.
Unfortunatelly this version is not tested in FW validation tests.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
b75b4153d6 intel_adsp: ace20_lnl: Add I2S clock source configuration
Add I2CLCTL_MLCS programming in SSP driver.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
b252673f13 intel_adsp: ace20_lnl: Fix hang issue on SSP power off
Clearing SPA bit together with OFFLEN bit causes FW hang.
This patch changes sequence to avoid that situation.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
3b518743d2 drivers: ssp: Program slot number basing on blob
The upper ssp slot number should be retrieved from configuration
blob to support all possible settings. This patch fix this issue.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
99d5d9aaa8 drivers: ssp: Repleace shim2 with hdamlssp
Repleace usage of shim2 device tree field with hdamlssp.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-18 10:48:18 -04:00
Jaroslaw Stelter
1e5550d262 intel_adsp: ace20_lnl: ssp: Program new HW registers
In LNL platform GPDMA and ALH is no longer used. SSP uses LINK HDA
as a DMA engine. Therefore new shim, new register definitions and new
programming flows were defined.

This patch implements new SSP programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-18 10:48:18 -04:00
Andriy Gelman
b8244fdabd drivers: sensor: Add adt7310 temperature sensor
Adds adt7310 temperature controlled via spi.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-04-17 10:06:04 -05:00
Andrzej Głąbek
8fba8aa535 drivers: flash: nrf_qspi_nor: Add custom API function to allow XIP
Normally, the driver deactivates the QSPI peripheral for periods when
no QSPI operation is performed. This is done to avoid increased current
consumption when the peripheral is idle. For the same reason, the base
clock on nRF53 Series SoCs (HFCLK192M) is configured for those periods
with the default /4 divider that cannot be used otherwise. However,
when XIP accesses are used, the driver must be prevented from doing
both these things as that would make XIP to fail. Hence, a function
is provided so that applications can inform the driver that XIP is
needed and the above idle actions should be suppressed.
This function (`nrf_qspi_nor_xip_enable()`) replaces the old one
(`nrf_qspi_nor_base_clock_div_force()`) that was intended for similar
purpose but after deactivation of the peripheral was introduced in
commit 95d867e8ed it became useless.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-04-17 16:43:16 +02:00
Henrik Brix Andersen
36249451ba drivers: rtc: update the RTC menuconfig title to unified format
Update the RTC driver menuconfig title to match the unified format
introduced in c41dd36de2.

Move the RTC driver menuconfig entry so the menuconfig list is still
(mostly) alphabetically sorted.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-04-17 16:34:46 +02:00
Henrik Brix Andersen
407eedbafa drivers: ethernet: add dependency to CONFIG_ETH_INIT_PRIORITY
Add a dependency on CONFIG_NET_L2_ETHERNET for
CONFIG_ETH_INIT_PRIORITY. This hides the Ethernet driver initialization
priority option in menuconfig unless CONFIG_NET_L2_ETHERNET is selected.

CONFIG_ETH_INIT_PRIORITY cannot currently be moved inside the
CONFIG_ETH_DRIVER if-statement in Kconfig as it is used outside the
Ethernet driver source files.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-04-17 16:31:47 +02:00
Martin Jäger
d655d00e8c drivers: eeprom: at2x: initialize after I2C/SPI
Introduce dedicated init priority for AT2X EEPROMs connected via
I2C or SPI to ensure they are initialized after I2C/SPI by default.

Signed-off-by: Martin Jäger <martin@libre.solar>
2023-04-17 16:31:00 +02:00
Matthias Hauser
6789c0d400 drivers: sensor: Added driver for the Würth Elektronik WSEN-PADS sensor
Added driver for the absolute pressure sensor WSEN-PADS

Signed-off-by: Matthias Hauser <Matthias.Hauser@we-online.de>
2023-04-17 11:49:35 +02:00
Robert Hancock
b1c0bf8499 drivers: i2c: add Xilinx AXI I2C driver
Add a driver to support the Xilinx AXI IIC Bus Interface logic core, as
described in Xilinx document PG090. This can be configured for use on
most Xilinx FPGA-based platforms such as the Digilent Arty.

Both the 2.00a and 2.1 versions of the core are supported. The 2.00a
revision has a bug causing dynamic read mode to not be reliable. With
this version of the core the driver falls back to reading only 1 byte
per interrupt.

Signed-off-by: Robert Hancock <robert.hancock@calian.com>
2023-04-17 11:39:21 +02:00
Thomas Stranger
f8a439561f drivers: clock_control: stm32 common: implement get_status api
The get_status api allows to query whether clock is turned on or off.
Like the get_rate call, the status of gated clocks (for specific
peripherals), as well as domain clock sources(HSE, PCLK, PLL_P,..)
can be checked this way.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2023-04-17 11:33:15 +02:00
Henrik Brix Andersen
1cfc85bab8 modules: segger: move Kconfig to modules/segger
Move the Segger RTT module Kconfig to modules/segger/kconfig. The Segger
debug library is not a driver and should not reside under drivers/debug.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2023-04-17 11:21:48 +02:00
Peter Johanson
1432b6e870 drivers: sensor: qdec_nrfx: Typo fix from trigger work.
Fix a typo introduced during move to store pointer to the
user supplied trigger.

Signed-off-by: Peter Johanson <peter@peterjohanson.com>
2023-04-17 10:20:06 +02:00
Alberto Escolar Piedras
83377046ba drivers: temp_nrf5: Fix warning in ISR prototype
The ISR prototype was changed some time ago
(6df8b3995e)
to (const void*) => fix isr function definition
to avoid a compile warning.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-04-17 10:19:33 +02:00
Marc Desvaux
3392eb6af3 drivers: hwinfo: modification into hwinfo_get_reset_cause()
add retrieve flag SB into hwinfo_get_reset_cause()
add Clear flag SB into clear_reset_cause()

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-04-17 10:15:35 +02:00
Andy Sinclair
0d68c86c95 drivers: gpio: npm1300: Initial driver for nPM1300 PMIC
Initial GPIO driver for NPM1300 PMIC

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-04-17 10:14:40 +02:00
Andy Sinclair
d1e201ccf6 drivers: regulator: npm1300: Initial driver for nPM1300 PMIC
Initial regulator driver for Nordic NPM1300 PMIC.

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-04-17 10:14:40 +02:00
Armando Visconti
15389ea902 modules/hal_st: Align sensor drivers to stmemsc HAL i/f v2.02
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.02. Please note that now a new function
callback, mdelay(), must be provided in case the stmemsc HAL requires
to wait for a certain amount of milliseconds before or after some
special operations.

Requires https://github.com/zephyrproject-rtos/hal_st/pull/13
(merged as 5948f7b3304f1628a45ee928cd607619a7f53bbb)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2023-04-14 10:51:15 -05:00
Marcus Folkesson
10818f75e2 drivers: dac: add support for ltc1660/ltc1665
LTC1665/LTC1660 is a 8/10-bit Digital-to-Analog Converter
(DAC) with eight individual channels.

Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
2023-04-14 08:21:23 -04:00
Erwan Gouriou
8e5a2cd45c drivers: entropy: stm32: Move clock check to post kernel operations
Don't check clock configuration before kernel was started since it
will prevent message to be displayed.
After kernel initialization, message is still valid and then ASSERT
more valuable to the user.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-04-14 14:04:26 +02:00
Gerard Marull-Paretas
667eeb11fb shell: fix MISRA 5.7 violations on struct shell
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-14 12:21:08 +02:00
Ibe Van de Veire
5fd08a3348 drivers: ethernet: eth_mcux: fixed sleep after carrier activation
The sleep after carrier activation was badly ported so the time
was 1000 ms instead of 1 ms.

Signed-off-by: Ibe Van de Veire <ibe.vandeveire@gmail.com>
2023-04-14 09:57:29 +02:00
Ibe Van de Veire
0927250fd2 drivers: ethernet: eth_mcux: fix phy_event state diagram sequence
When the phy_event state diagram ends up in the
eth_mcux_phy_state_read_status case, the eth carrier
is enabled. However, this step only happens when an
interface is available in the context.

Regardless of the state of the iface, the state machine
will switch to eth_mcux_phy_state_read_duplex in the next
iteration. Thus, the states diagram never returns to the
previous state. As a result, the eth carrier will never
be enabled in the future.

This problem is fixed by setting the wait state if the
iface is not available.

Signed-off-by: Ibe Van de Veire <ibe.vandeveire@gmail.com>
2023-04-14 09:57:29 +02:00
Pierre-Louis Bossart
a744e8eaf3 drivers: dai: intel: dmic: don't set ACE2.x LCTL::OFLEN
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.

Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
2023-04-13 20:51:10 -04:00
Jaroslaw Stelter
b8d9b833a2 intel_adsp: ace20_lnl: dmic: Add HDA channel map programming
Add new field to dai_config structure and function that
program it in HW register.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-13 20:51:10 -04:00
Jaroslaw Stelter
2547948544 intel_adsp: ace20_lnl: dmic: Program new HW registers for dmic
In LNL platform GPDMA and ALH is no longer used. DMIC uses LINK HDA
as a DMA engine. Therefore new shims, new register definitions and new
programming flows were defined.

This patch implements new DMIC programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-13 20:51:10 -04:00
Jaroslaw Stelter
dc9f7b44fe intel_adsp: ace20_lnl: dmic: Add new DMIC shims to driver
Add initialization of new DMIC shims to driver for LNL
platform only.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-13 20:51:10 -04:00
Anisetti Avinash Krishna
79f2b5471c drivers: serial: ns16550: Fixed a bug related to shell failure
Updated boot priority to PRE_KERNEL_1 for all instances
and removed dependency on PCIe. As shell is not working
in a situation where console is using a UART instance
under PCIe and boot priority set to POST_KERNEL.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-04-13 20:50:41 -04:00
Declan Snyder
65aad527b7 drivers: lpadc: Enable VREF in init
Enable VREF peripheral in the LPADC init
so that ADC can measure voltages properly.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-13 16:13:25 +02:00
David Leach
70d045fd7a drivers: adc: Add LPADC driver support to lpc55s36
Add LPADC support to LPC55S36 SOC platform

Signed-off-by: David Leach <david.leach@nxp.com>
2023-04-13 16:13:25 +02:00
Guillaume Gautier
b323c0f227 drivers: sensor: stm32_temp: add negative temperature coefficient
Add support for negative temperature coefficient for single calibration
chips in the STM32 temperature driver.
That feature is necessary for STM32F0x0.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-04-13 09:11:45 -05:00
Alberto Escolar Piedras
659e2292a5 soc_inf: Refactor native tasks into own header
The native_tasks definition was directly in the soc_inf soc.h
header. But soc.h pulls a lot of other headers.
Some of those could cause conflicts, say with application
headers, for users who only wanted the be able to register
native tasks in a module.

Let's refactor the native tasks definitions into their own header
and include that header from soc_inf's soc.h.
In this way users who need only need to register a native tasks
can just include posix_native_tasks.h, and all previous users
see no change.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
2023-04-13 13:35:20 +02:00
Georgij Cernysiov
44e4b077ad drivers: flash: stm32 ospi add dlyb bypass prop
Allows to bypass delay block (DLYB).

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2023-04-13 12:15:13 +02:00