XIP support in x86 was something of a mess. This
patch does the following:
- Generic ia32 SOC no longer defines a "flash" region
as generic X86 devices don't have a microcontroller-
like concept of flash. The same has been done for apollo_lake.
- Generic ia32 and apollo_lake SOCs starts memory at 1MB.
- Generic ia32 SOC may optionally have CONFIG_XIP enabled.
The board definition must provide a flash region definition
that gets exposed as DT_PHYS_LOAD_ADDR.
- Fixed definitions for RAM/ROM source addresses in ia32's
linker.ld when XIP is turned off.
- Support for enabling XIP on apollo_lake SOC removed, there's
no use-case.
- acrn and gpmrb boards have flash and XIP related definitions
removed.
- qemu_x86 has a fake flash region added, immediately after system
RAM, for use when XIP is enabled. This used to be in the ia32 SOC.
However, the default for qemu_x86 is to now have XIP disabled.
- Fixed tests/kernel/xip to run by default on boards that enable
XIP by default, plus an additional test to exercise XIP on
qemu_x86 (which supports it but has XIP switched off by default)
The overall effect of this patch is to:
- Remove XIP configuration for SOC/boards where it does not make
any sense to have it
- Support testing XIP on qemu_x86 via tests/kernel/xip, but leave
it off by default for other tests, to ensure it doesn't bit-rot
and that the system works in both scenarios.
- XIP remains an available feature for boards that need it.
Fixes: #18956
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Minnowboard should not run the XIP test as it doesn't execute-in-place.
Updated the test specification to exclude Minnowboard.
Fixes#14099.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This board is unmaintained and unsupported. It is not known to work and
has lots of conditional code across the tree that makes code
unmaintainable.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Per ZEP-1958, Phase 2 of adding CC3220sf LaunchXL support,
was to "deprecate the CC3200 launchxl support in Zephyr
(redundant to the CC3220)."
Effectively, the CC3220 SOC replaces the CC3200.
This patch removes the following:
* the imported CC3200 SDK
* CC3200 SOC, board, DTS files.
* adjusts other files where cc3200 was mentioned.
Also, it fixes explicit references to CC3200 in generic
CC32xx driver files.
Jira: ZEP-1958
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
This will prepare test cases and samples with metadata and information
that will be consumed by the sanitycheck script which will be changed to
parse YAML files instead of ini.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
