Commit Graph

20 Commits

Author SHA1 Message Date
Carlo Caione
d048faacf2 aarch32: Add header shims to support old file locations
Out-of-tree code can still be using the old file locations. Introduce
header shims to include the headers from the new correct location and
print a warning message.

Add also a new Kconfig symbol to suppress such warning.

The shim will go away after two releases, so make sure to adapt your
application for the new locations.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Carlo Caione
aec9a8c4be arch: arm: Move ARM code to AArch32 sub-directory
Before introducing the code for ARM64 (AArch64) we need to relocate the
current ARM code to a new AArch32 sub-directory. For now we can assume
that no code is shared between ARM and ARM64.

There are no functional changes. The code is moved to the new location
and the file paths are fixed to reflect this change.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-20 11:40:59 -05:00
Peter Bigot
ce3f07954a arch/arm: rearrange for standard use of extern "C"
Consistently place C++ use of extern "C" after all include directives,
within the negative branch of _ASMLANGUAGE if used.

In arch.h the extern "C" in the including context is left active during
include of target-specific mpu headers to avoid more complex
restructuring.

Background from issue #17997:

Declarations that use C linkage should be placed within extern "C"
so the language linkage is correct when the header is included by
a C++ compiler.

Similarly #include directives should be outside the extern "C" to
ensure the language-specific default linkage is applied to any
declarations provided by the included header.

See: https://en.cppreference.com/w/cpp/language/language_linkage
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-08-20 00:49:15 +02:00
Anton Gerasimov
ac4eb32293 arch: arm: fix "template with C linkage" in cmsis.h
The error manifests itself when including cmsis.h from C++ code

Signed-off-by: Anton Gerasimov <agerasimov@twilio.com>
2019-05-20 11:58:39 -04:00
Andrzej Głąbek
20202902f2 dts_fixups: Use DT_ prefix in all defined labels not related to Kconfig
These changes were obtained by running a script  created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:

1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
   #define X Y)
3. Check if that name is also the name of a Kconfig option
   3.a If it is, then do nothing
   3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
       has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
   (.c, .h, .ld)

Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.

Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2018-11-13 10:44:42 -06:00
Adithya Baglody
31c8817d60 include: arm: CMSIS header redefining MPU_PRESENT.
The header should check if the macro _MPU_PRESENT is defined
and create it only if not defined.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-09-20 20:35:25 -04:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Ioannis Glaropoulos
7c91a4a53b arch: arm: fix SecureFault IRQn for non-CMSIS compliant MCUs
This commit fixes the SecureFault IRQ number for non-CMSIS
compliant ARM Cortex-M MCUs. Erroneous IRQ number was introduced
in ec398e87796f8da2529f369746ae9b2b12d48ca4.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-05-15 08:57:16 -05:00
Ioannis Glaropoulos
65607ee104 arch: arm: SecureFault_IRQn for non-CMSIS-compliant MCUs
Define IRQ number for SecureFault Handler when building Secure
Firmware for non-CMSIS-compliant ARM Cortex-M MCUs.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-20 21:34:01 +08:00
Ioannis Glaropoulos
bd0ff3092a arch: arm: cmsis: cleanup cmsis.h and update error-code macros
This commit removes the macros for ARM fault flags from
include/arch/arm/cortex_m/cmsis.h header, since they are
defined in the respective core_cmXX.h header files. It also
modifies fault.c to use the updated fault macros taken directly
from ARM CMSIS headers.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-10 11:42:25 -06:00
Ioannis Glaropoulos
b518d35c4c arch: arm: fix bug in escalted HF dump
This commit fixes a bug in the ARM HardFAult handler, which
prevented from dumping the right UsageFault flags, after a
UsageFault had escalated to HardFault.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-03-08 08:33:08 -06:00
Ioannis Glaropoulos
0d6fa4db0a arch: arm: define Cortex-M23, Cortex-M33 CPUs
This commit defines the Kconfig options for
ARM Cortex-M23 and Cortex-M33 CPUs. It also
udpates the generic memory map for M23 and M33
implementations.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-02-08 12:07:38 -06:00
Ioannis Glaropoulos
a0a03d7597 arch: arm: common Armv8-M support
This PR includes the required changes in order to support
conditional compilation for Armv8-M architecture. Two
variants of the Armv8-M architecture are defined:
- the Armv8-M Baseline (backwards compatible with ARMv6-M),
- the Armv8-M Mainline (backwards compatible with ARMv7-M).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2018-02-08 12:07:38 -06:00
Kumar Gala
2ebde14df7 arm: Add build time consistency check for irq priority defines
We need to make sure that __NVIC_PRIO_BITS & CONFIG_NUM_IRQ_PRIO_BITS
are set to the same value.  Add a simple build time check to ensure
this is the case.  This is to catch future cases of issues like
ZEP-2243.  This is a stop gap til we resolve ZEP-2262, which covers use
of both __NVIC_PRIO_BITS & CONFIG_NUM_IRQ_PRIO_BITS.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-06-16 16:18:12 -04:00
Kumar Gala
cc334c7273 Convert remaining code to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies.  We also convert the PRI printf formatters in the arch
code over to normal formatters.

Jira: ZEP-2051

Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 11:38:23 -05:00
David B. Kinder
2e5d517ee4 spell: fix comment typos: /include/arch/*
Scanning for typos in comments and strings.

Change-Id: I3d4db89e0824959252c79c19baa50028354247bd
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2017-04-18 16:22:55 -07:00
Kumar Gala
3a7cc31e08 arm: cmsis: cleanup use of _SCS_CPACR_CP1{0,1}_Pos define
_SCS_CPACR_CP10_Pos and _SCS_CPACR_CP11_Pos come from scs.h, we have
versions defined in cmsis.h we should be using instead.

Change-Id: Icd8db02000bbc9ef8b2cf89d359e008f62a7d5e9
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-02-10 14:47:41 -06:00
Kumar Gala
d2679c7bbb arm: cmsis: Convert _Scb*FaultIs* & _ScbIs*Fault to use CMSIS register access
Converted:
	_ScbHardFaultIsBusErrOnVectorRead
	_ScbIsMemFault
	_ScbMemFaultIsMmfarValid
	_ScbMemFaultIsStacking
	_ScbMemFaultIsUnstacking
	_ScbMemFaultIsDataAccessViolation
	_ScbMemFaultIsInstrAccessViolation
	_ScbIsBusFault
	_ScbBusFaultIsBfarValid
	_ScbBusFaultIsStacking
	_ScbBusFaultIsUnstacking
	_ScbBusFaultIsImprecise
	_ScbBusFaultIsPrecise
	_ScbBusFaultIsInstrBusErr
	_ScbIsUsageFault
	_ScbUsageFaultIsDivByZero
	_ScbUsageFaultIsUnaligned
	_ScbUsageFaultIsNoCp
	_ScbUsageFaultIsInvalidPcLoad
	_ScbUsageFaultIsInvalidState
	_ScbUsageFaultIsUndefinedInstr

To use direct CMSIS register access

Jira: ZEP-1568

Change-Id: I2a99a4101c5960f825a502c225e511e49fe93bba
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-02-10 14:47:41 -06:00
Carles Cufi
88bbd6ccb1 arm: cmsis: Convert enable_floating_point to use CMSIS
As a first step towards removing the custom ARM Cortex-M Core code
present in Zephyr in benefit of using CMSIS, this change replaces
the use of the custom core code with CMSIS macros in
enable_floating_point().

Jira: ZEP-1568

Change-id: I544a712bf169358c826a3b2acd032c6b30b2801b
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:54 -06:00
Kumar Gala
457a5988c4 arm: cmsis: Introduce CMSIS layer
Support using CMSIS defines and functions, we either pull the expect
defines/enum from the SoC HAL layers via <soc.h> for the SoC or we
provide a default set based on __NVIC_PRIO_BITS is defined.

We provide defaults in the case for:
	IRQn_Type enum
	*_REV define (set to 0)
	__MPU_PRESENT define (set to 0 - no MPU)
	__NVIC_PRIO_BITS define (set to CONFIG_NUM_IRQ_PRIO_BITS)
	__Vendor_SysTickConfig (set to 0 - standard SysTick)

Jira: ZEP-1568

Change-Id: Ibc203de79f4697b14849b69c0e8c5c43677b5c6e
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:54 -06:00