Add an optional actual-key-mask property to filter out key combinations
that are not implemented in the actual keyboard matrix.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
U-blox SARA-R4 already exists but the behavior is different,
requiring a separate driver instance. For instance, R5 autostarts,
so this commit also adds support for skipping power on pulse.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
Based on stm32wba55, stm32wba55Xg is similar from device tree description
to stm32wba52Xg.
Take the opportunity to fix stm32wba52Xg descriuption scheme which was
missing stm32wba52.dtsi.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Fixes an issue with the register addresses which was caused by a
missing `ranges;` option for the power peripheral
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add a poll and scan mode for the driver. If any of these are set, the
driver does not use the GPIO interrupts to detect when the matrix has to
switch to polling mode. Instead, it keeps polling it all the time,
either by enabling all the columns and poll the rows for activity, or
just keep scanning all the time.
Poll mode is useful if the specific SoC used does not support GPIO
interrupt on all the row GPIOs at the same time, scan mode if it does
not even support selecting all the columns at the same time.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Tweak the polling mode so that the driver never exit polling mode if
poll_timeout_ms is 0. This is useful if the specific driver does not
support idle mode.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit introduces a new interrupt controller driver used
for NXP's IRQ_STEER IP.
Apart from introducing the driver itself, this commit contains
the following changes:
1) Switch i.MX8MP to using the XTENSA core interrupt
controller instead of the dummy irqsteer one.
* this is required because the binding for the
irqsteer driver is no longer a dummy one
(since it's being used by the irqsteer driver).
As such, to avoid having problems, switch to
using another dummy binding.
2) Modify the irqsteer dummy binding such that it
serves the IRQ_STEER driver's needs.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
This PR set the correct value for the stm32F7 devices.
And change vrefint-cal-addr to <0x1FF07A2A> for stm32F722-F723
soc serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Many driver APIs are opting to provide an `emul` driver
implementation that can be used for a number of purposes.
- providing an ideal / model driver for reference
- configurable backends
- seamless integration with device tree
- support for native posix, qemu, and any other board
- fast regression testing of app and library code
Provide an initial set of bindings for `zephyr,dma-emul` devices.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
These were first deprecated in v3.2. We have kept support for them
for as long as we can, but now their presence is causing CI failures
in some configurations. Specifically, using the deprecated 'label'
property is causing a warning which is promoted to an error in some
twister runs. This is blocking other forward progress in the
devicetree API.
I tried to rework the tests to avoid this, but it was too much effort
for the time I had to work on the task. Removing the APIs is therefore
unfortunately the best way forward to unblocking other work.
Re-work the test suite a bit to maintain coverage where we are using
the label property to test other macros.
Add a migration guide section to help with the transition.
Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
The possible settings for the lps22df and lps28dfw sensor are overlapping,
except the Full-Scale mode setting. Threrefore we can change the macros
from LPS22DF_DT_[..] to LPS2xDF_DT_[..].
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
The LPS28DFW is an ultracompact, piezoresistive, absolute pressure sensor.
Compared to the LPS22DF, the LPS28DFW is waterproof and has a Dual FS
capability and does not have SPI. This commit extends the LPS22DF driver to
be compatible with the LPS28DFW device.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
Use the "ambiq,gpio" binding to combine the "ambiq,gpio-bank"
child nodes for Apollo4 Plus soc.
Also update the GPIO driver accordingly.
Signed-off-by: Aaron Ye <aye@ambiq.com>
This Ambiq gpio binding provides the GPIO pin mapping for GPIO child
nodes tosolve the limitation of the maximum 32 pins handling in GPIO
driver API.
The gpio-bank nodes can be created under the gpio parent node.
Signed-off-by: Aaron Ye <aye@ambiq.com>
This removes all occurrences of arm,num-mpu-regions relying on the value
reported by the register instead.
A user may still define this property if they need to have a compile time
definition for it.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
The C code does not required this parameter to be defined and falls back
to the MPU_TYPE's register to return the appropriate value.
Signed-off-by: Wilfried Chauveau <wilfried.chauveau@arm.com>
In case of boards where REF_CLK signal is not connected
to the GPIO0 by default add the possibility to use
the optional GPIO16/GPIO17 as a REF CLK source.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Although the RT1015 only supports 128 KB of FlexRAM being used at once, the
default fusemap overallocates 160KB of FlexRAM. The JLink flashloader
algorithm appears to rely on the 64KB of DTCM in the default fusemap
being configured. Reducing the DTCM allocation resulted in JLink
failing to flash the SOC.
To resolve this, utilize the default fusemap of {O, O, D, D, I} for the
RT1015 FlexRAM setup. Add a note about the restrictions on using
overallocated FlexRAM to the SOC DTSI.
Fixes#65889
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add Driver for KSZ8081 Ethernet PHY. The Generic MII Driver
is not sufficient to use for this PHY chip which has special
vendor implemented behaviors.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add a property to the ethernet controller binding
indicating what type of connection the MAC has with
the PHY device.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The Device Multiplexer (devmux) is a pseudo-device that can
be used to select between multiple included sub-devices.
It is experimental, but its current use is in system
remediation. Take for example, the scenario where the
system console and log subsystem both have the uart backend
enabled. The case may arise, where the chosen backing uart
could be an abstraction of another very high-bandwidth bus
- such as a PCIe BAR, a UDP socket, or even even just memory.
If the "service" (for lack of a better term) that backs this
abstract "uart" experiences an error, it is of critical
importance to be able to switch the system console, uart log
backend, or whatever to another uart (semi-transparently) in
order to bring up a shell, continue to view system logs, or
even just support user console I/O.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Add support for mutable devices. Mutable devices are those which
can be modified after declaration, in-place, in kernel mode.
In order for a device to be mutable, the following must be true
* `CONFIG_DEVICE_MUTABLE` must be y-selected
* the Devicetree bindings for the device must include
`mutable.yaml`
* the Devicetree node must include the `zephyr,mutable` property
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Adds the tja1103 enet phy for setting phy options on the mr_canhubk3.
Co-authored-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Co-authored-by: Peter van der Perk <peter.vanderperk@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
MDIO controller is part of GMAC and it requires GMAC ethernet driver to
initialize first because it will reset the whole GMAC hw block during
initialization. Both C22 and C45 APIs are supported.
Co-authored-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
add dts support for watchdog to accomodate watchdog driver bringup on
aglex and agilex5
Signed-off-by: Balsundar Ponnusamy <balsundar.ponnusamy@intel.com>
The number of IRQ priority bits was incorrectly set to 3 instead
of 2, which is the correct number for Cortex-M0+.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
After porting from h5 to f7 i noticed that not all mcus have
cpu node labels. Added cpu0 node labels to all stm32 dts.
Signed-off-by: Kacper Dalach <dalachowsky@gmail.com>
Revert "dts: bindings: LPtimer of stm32 has a x2 factor on its clock"
The stm32u5 lptim clock source has no prescaler to divide the
the LPTIM input clock frequency : no property required.
This reverts commit 572b286010.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
r8a779f0 is also know as S4, this SoC is part of the Gen4 SoC series,
has 8 Cortex-A55 and a dual core lockstep Cortex-R52 processor.
SCIF0 is dedicated to Zephyr and SCIF3 to Linux.
**Control Domains**
IMPORTANT: This SoC is divided into two "domains":
- Application domain contains some peripherals as well as A55 & R52 cores.
- Control domain that contain a G4MH/RH850 MCU and other peripherals.
In order to access control domain peripherals such as gpio4-7 and CAN-FD
from application domain, the G4MH MCU has to unlock a protection
mechanism from control domain buses.
"Protected" controllers will be flagged in gen4 device trees,
warning users that they need to flash a custom G4MH firmware
to unlock access to these controllers.
**Clock controller**
This SoC clock controller is offering "domains"
for each world (Zephyr/Linux).
These domains are several "entry points" to the clock controller
which are arbitrated to avoid a world from turning off a clock needed
by another one.
We decided to use the same domain as Linux because the
security mechanism as to be implemented before accessing
another domain.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add support of r8a779f0 cpg driver.
r8a779f0 soc has its own clock tree.
Gen4 SoCs common registers addresses have been added in header.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
