STM32WL features a specific HSE clock with dedicated properties.
Add a dedicated binding and update STM32 clock control driver
header to take it into account.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds support for the Legend 2.5" boards (legend25_ssd and
legend25_hdd) based on the STM32F070CB MCU. These boards can be found in
the Seagate FireCuda Gaming Drive, Gaming Drive for Xbox, SSD Gaming
Drive for Xbox, and Gaming Drive for PlayStation devices. Both boards
contain the following hardware components:
- A B1414 LED strip connected to the PA7 pin (SPI MOSI)
- A SPI flash (FM25F005) connected on SPI2 bus
The Legend 2.5" HDD board also contains an activity LED connected on
TIM3 CH3
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
The bt_sdp_get_add_proto_param is used to get the protocol
parameter from Additional Protocol Descriptor List.
In order to implement it, one parameter
(proto_profile_index) is added to sdp_get_uuid_data_index
to get the indexed item.
Fix one bug in sdp_get_uuid_data because there may be more
than 2 consequent "seq len item".
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
ARC MWDT doesn't support building Zephyr as an native
application (CONFIG_NATIVE_APPLICATION).
ARC MWDT doesn't support building with CONFIG_NEWLIB_LIBC
as it doesn't have newlib.
Let's explicitly forbid to use these Kconfig options for the
MWDT toolchain.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
As of today we have libraries provided by MWDT build with
stackcheck enabled. So we have to provide dummy
_fstack, _estack to make it working.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The ring buffer's static declarations now declare the
ring buffer's data as __noinit, to avoid unnecessary
initialization of the buffer.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Enable RISC-V GP relative addressing by linker relaxation to reduce
the code size. It optimizes addressing of globals in small data section
(.sdata).
The gp initialization at program start needs each SoC support. Also,
if RISC-V SoC has custom linker script, SoC should provide
__global_pointer$ symbol in it's linker script.
Signed-off-by: Jim Shu <cwshu@andestech.com>
Document the behavior of the include name option when this is changed by
updating the advertising parameters of the advertising set.
In this case we cannot update the advertising data since the host does
not have a copy to modify. The application will have to do update with
its current advertising data.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
So far pcie_get_mbar() has been the only way to retrieve a MBAR. But
it's logic does not fit all uses cases as we will see further.
The meaning of its parameter "index" is not about BAR index but about
a valid Base Address count instead. It's an arbitrary way to index
MBARs unrelated to the actual BAR index.
While this has proven to be just the function we needed so far, this has
not been the case for MSI-X, which one (through BIR info) needs to
access the BAR by their actual index. Same as ivshmem in fact, though
that one did not generate any bug since it never has IO BARs nor 64bits
BARs (so far?).
So:
- renaming existing pcie_get_mbar() to pcie_probe_mbar(), which is a
more relevant name as it indeed probes the BARs to find the nth valid
one.
- Introducing a new pcie_get_mbar() which this time really asks for the
BAR index.
- Applying the change where relevant. So all use pcie_probe_mbar() now
but MSI-X and ivshmem.
Fixes#37444
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is the configuration of the stm32h723 where the
dma1 & dma2 of type V1 with a MUX. Even if DMA is of type V1,
the 'feature' does not exist with DMAMUX
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Clarify the PWM pwm_pin_set_cycles() function API details.
The API aims for synchronous (glitch-free) updates of the PWM period and
pulse width, but not all PWM controllers support this.
Similarly, the API aims for independance between channels on
multi-channel PWM controllers, but not all PWM controllers support this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds missing API that allows to discard the Subscription
List of a vendor model.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Name length can't be longer than 8 bytes. This needs to be clarified
in the bt_mesh_model_data_store() documentation.
Signed-off-by: Pavel Vasilyev <pavel.vasilyev@nordicsemi.no>
Add features: connection CTE request, connection CTE response
and receiving constant tone extensions; to HCI and features
supported by controller.
The features are not enabled yet.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
Use a semaphore to prevent the hawkbit_probe from running more than once
at the same time since it reset the hawkbit context on entry and will
affect other running instance.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
RISC-V global pointer (GP) register is neither caller nor callee
register, and it's a constant value in the single ELF file. Thus, we
don't need to save/restore GP at ISR enter/exit. Remove it to optimize
context switch performance.
Signed-off-by: Jim Shu <cwshu@andestech.com>
In commit 00f95032938e1387126f453b64f8c479987ca16e to make
k_current_get() work without syscall, a new z_current_get()
was introduced since there are times when thread local
storage has not been initialized. However, this was not
marked with const attribute the same as k_current_get().
This may result in slower compiled code as each call to
z_current_get() may actually need to go through the whole
function call process instead of reusing the result from
previous call in the same scope. So add const attribute
to z_current_get() to restore the old behavior.
Fixes#37460
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Change the behaviour of `lora_send` to block until the transmission
completes. The current asynchronous behaviour is exposed through the
new function `lora_send_async`. This naming convention brings LoRa in
line with other asynchronous subsystems.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
There are no reference for either K_NUM_PRIORITIES or
K_NUM_PRIO_BITMAPS, with the former being dropped in:
1acd8c2996 kernel: Scheduler rewrite
Dropping both of these, and also the two comments about extra priorities
taking extra RAM space, as those do not seem to apply either.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Ring buffer claims that no synchronization is needed
when there is a single producer and single consumer.
However, recent changes have broken that promise since
indexes rewind mechanism was modifing head and tail
when consuming. Patch fixes that by spliting rewinding
of indexes so that producer rewinds tail only and
consumer rewinds head.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This macro is referenced by most of the architecture linker scripts, yet
it is only defined in the Metaware toolchain linker header.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
When running non-XIP, userspace threads need to be able to read .text in
order to execute code. Cortex-R needs to setup an MPU entry to allow
this, but it must be aligned to a power of 2. The linker scripts for
other archs follow this same pattern of aligning the location counter,
but outside of an input section. The linker ignores this and places the
next input section at the LMA of the end of the previous input section.
Avoid this problem by make RODATA the last ROM section. The MPU_ALIGN
can be moved inside the RODATA input section and correctly pad the
entire ROM section out to a power of 2 boundary.
_image_rom_end_order contains the power of 2 alignment which allow the
soc to set the MPU configuration statically based on the size of the ROM
sections instead of having to do it dynamically.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
With the addition of userspace support, Cortex-R needs to use SVC calls
to handle oops exceptions. Add that support by defining ARCH_EXCEPT to
do a svc call.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
The user thread cannot be trusted so do not use the stack pointer it
passes in. Use the thread's privilege stack when in privileged modes to
make sure a user thread does not trick the svc/isr handlers into writing
to memory it should not.
Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
Its possible that a dts binding doesn't inherit from base.yaml and
thus doesn't have `wakeup-source` defined. To handle these cases
use DT_PROP_OR() which can deal with a property not existing at
all.
Fixes#37676
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The current riscv linker script don't have sections for
Data & Instruction Tightly Coupled Memory. Add itcm and
dtcm sections to make it available. All sections were
8 byte align to keep compatible with rv64 SoCs.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Don't define clockid_t in Zephyr in case of ARC MWDT libc
is used as ARC MWDT libc provides clockid_t.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
MWDT provides paddr_t type and it conflicts witn Zephyr definition:
- Zephyr defines paddr_t as a uintptr_t
- MWDT defines paddr_t as a unsigned long
This causes extra warnings. However we can safely define
paddr_t as a unsigned long for the case when MWDT toolchain is used as
they are both unsighned, have same size and aligning.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
ARC MWDT don't provide ssize_t type which is used in Zephyr.
Define ssize_t for ARC MWDT toolchain.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
ARC MWDT toolchain misses stdout hooks implementation and
itimerspec structure in timespec header. Let's add them in
arcmwdt compatibility layer.
The implementation was inspired by libc-hooks.c for NEWLIB.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Switch the actual API implementation to the external API and mark the
internal ones as __DEPRECATED_MACRO.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This migrates all the current iterable section usages to the external
API, dropping the "Z_" prefix:
Z_ITERABLE_SECTION_ROM
Z_ITERABLE_SECTION_ROM_GC_ALLOWED
Z_ITERABLE_SECTION_RAM
Z_ITERABLE_SECTION_RAM_GC_ALLOWED
Z_STRUCT_SECTION_ITERABLE
Z_STRUCT_SECTION_ITERABLE_ALTERNATE
Z_STRUCT_SECTION_FOREACH
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Currently, with EATT enabled, when bt_gatt_read is called with multiple
handles first it'll try to use gatt_read_mult_vl, and if it fails
gatt_read_mult will be used to try again. Add option to skip
the gatt_read_mult_vl and use gatt_read_mult right away. This is needed
by tests that expect BT_ATT_OP_READ_MULT_REQ but support variable
lenght, thus don't return BT_ATT_ERR_NOT_SUPPORTED.
Removed fallback from read multiple vl to read multiple on
BT_ATT_ERR_NOT_SUPPORTED error.
This was affecting:
GATT/CL/GAR/BV-05-C, GATT/CL/GAR/BI-18-C, GATT/CL/GAR/BI-19-C,
GATT/CL/GAR/BI-20-C, GATT/CL/GAR/BI-21-C, GATT/CL/GAR/BI-22-C
Signed-off-by: Krzysztof Kopyściński <krzysztof.kopyscinski@codecoup.pl>
