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5 Commits

Author SHA1 Message Date
Savinay Dharmappa
eddfd537d2 arch: xtensa: Add I/O functions to read/write. 
patch add I/O function to read / write from 16 bit
memory mapped registers

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
 2018-11-13 18:49:03 -05:00
Flavio Ceolin
67ca176754 headers: Fix headers across the project 
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
 2018-09-17 15:49:26 -04:00
Rajavardhan Gundi
47ff96593f intel_s1000: uart: configure UART for intel_s1000 
intel_s1000 uses DesignWare IP for UART. National Semiconductor
16550 (UART) component specification is followed in this IP.

Change-Id: Ied7df1dc178d55b6dbe71d729d6383ba07274ea4
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2018-05-01 16:46:41 -04:00
Kumar Gala
cc334c7273 Convert remaining code to using newly introduced integer sized types 
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.  This handles the remaining includes and kernel, plus
touching up various points that we skipped because of include
dependancies.  We also convert the PRI printf formatters in the arch
code over to normal formatters.

Jira: ZEP-2051

Change-Id: Iecbb12601a3ee4ea936fd7ddea37788a645b08b0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
 2017-04-21 11:38:23 -05:00
Mazen NEIFER
aacfd63331 Xtensa port: Removed duplicate file and renamed to sys_io.h as other platforms. 
Change-Id: I293bfa9ff8c5e641c727612c56968cec901dbfec
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
 2017-02-13 08:04:27 -08:00