Commit Graph

1824 Commits

Author SHA1 Message Date
Erwan Gouriou
9b7d3657c9 tests: clock_control: stm32h7_devices: Test perck domain config
Add a test dedicated to verify the perck domain clock configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Erwan Gouriou
cf84395f7b tests: clock_control: stm32h7_devices: Test perck configuration
When it needs to access perck clock speed, clock_control driver is using
LL API to read RCC registers and compute frequency.
We're using the exact same method to test the frequency and as a result
we were not able to detect that there was an issue when configuring this
clock.

Add a specific case to this test in order to verify perck domain clock if
perck is used in SPI clk configuration.

We're now able to detect issues (and test is failing).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Erwan Gouriou
efd6fdb381 tests: clock_control: stm32: Enhance tests log messages
Perform some rework in messages displayed in case of failure to ease
readability:
- remove redundant information
- add missing information
- convert registers values to hex

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Erwan Gouriou
447c3df873 tests: clock_control: stm32h7_devices: Fix clock source check
Test was using "clock-names" property to query domain clock configuration.
This is not working since clock-names was removed in the last step of the
feature implementation and whole macro was always reporting DT_NO_CLOCK.

This issue went undetected because of an additional issue in the exception
case which was testing "zassert_true(1, .." instead of "zassert_true(0, .".

Fix both issues to make the test efficient again.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Francois Ramu
5857b7ea41 tests: drivers: uart async on nucleo_wb55rg with DMA
Configure through an overlay file, the nucleo_wb55rg board
for running the tests/drivers/uart/uart_async_api.
DMAMUX is used for transfer on channels 0 & 1 with
LPUART peripheral request 17 & 16.
No hw flowcontrol for this test.
Connect pin A0 & A1 of CN8 to PASS the test.
Note that I2C3 pin assignment might conflict (PC0 & PC1).

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-09 10:43:35 +01:00
Tom Burdick
32d10fca25 tests: spi_loopback: Enable SPI testing on SAM
Adds the needed overlays and board dtsi modifications to run the
spi loopback test on the sam e70 xplained, tdk robokit1, and sam v71 xult.

Tests both DMA and non-DMA configurations.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-11-08 09:37:59 +00:00
Dat Nguyen Duy
8db84cfa6a tests: drivers: gpio_api_1pin: support GPIO interrupt tests for NXP S32Z27
add support GPIO input interrupt tests for NXP S32Z27

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-04 17:44:08 -04:00
Dat Nguyen Duy
1db8419868 tests: drivers: gpio_basic_api: support to run the test on NXP S32Z27
Add support to run the test on NXP S32Z27, the wiring connection
is needed as describe in overlay file

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-04 17:44:08 -04:00
Stancu Florin
33b86d6945 tests: ADC API: add support for cc1352r* boards
Add ADC API tests for the TI CC1352R1 LaunchXL, CC2652R1 LaunchXL and
TI CC1352R SensorTag boards.

Signed-off-by: Stancu Florin <niflostancu@gmail.com>
2022-11-04 17:31:59 -04:00
Francois Ramu
4d5c99060a tests: drivers: dma: test the DMA drivers on the stm32MP157 disco kit
Define configuration to run the tests/drivers/dma
on the stm32mp157c_dk2 disco platform

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-11-04 10:16:56 +01:00
Miguel Dardenne
cf175b3f6f boards: Add support for Adafruit Feather M0 with LoRa radio
Add support for the Feather M0 LoRa board, including support of its
Semtech Lora radio. Tested the radio using a pair of boards.

Signed-off-by: Miguel Dardenne <miguel.dardenne@gmail.com>
2022-11-04 08:53:49 +00:00
Peter Johanson
29047f11ed drivers: adc: Fix ADC tests for new RP2040 board.
Fix ADC tests now that we have more than one RP2040 board.

Signed-off-by: Peter Johanson <peter@peterjohanson.com>
2022-11-03 18:15:38 +01:00
Henrik Brix Andersen
f30a5969d0 drivers: can: make the fake CAN driver generally available
Make the fake CAN controller driver available for use in tests outside of
the CAN shell test.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-11-02 08:19:33 -07:00
Henrik Brix Andersen
836f582664 drivers: can: skip all CAN loopback mode tests for kvaser,pcican
Skip all CAN controller tests utilizing CAN loopback mode for the
kvaser,pcican CAN controller card as emulated in QEMU.

QEMU emulation of the SJA1000 CAN controller backend does not yet support
the SJA1000 Self Reception Request command which is required for proper
loopback operation.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2022-11-01 15:22:31 -04:00
Neil Armstrong
7266f82141 test: drivers: entropy: add overlay for PSA Crypto Random entropy
This adds an overlay DT & config to enable the PSA Crypto Random entropy
driver to get random bytes from TFM.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2022-10-27 16:32:05 +02:00
Hu Zhenyu
237f317eec tests: Add the test case of GY271 on I2C0 of it8xxx2_evb
Add the alias of GY271 in it8xxx2_evb.overlay. Modify the
testcase.yaml, as the GY271 is magnetic sensor, not accelerometer
and remove the harness.

Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
2022-10-26 12:01:59 +02:00
Henrik Brix Andersen
c49011442a tests: drivers: can: api: test sending CAN-FD frame in non-FD mode
Add test case for verifying that CAN-FD format frames cannot be sent in
non-FD mode.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-10-25 16:32:10 +02:00
Henrik Brix Andersen
f8a88cdb27 drivers: can: use flags fields for can_frame and can_filter structs
The can_frame and can_filter structs support a number of different flags
(standard/extended CAN ID type, Remote Transmission Request, CAN-FD format,
Bit Rate Switch, ...). Each of these flags is represented as a discrete bit
in the given structure.

This design pattern requires every user of these structs to initialize all
of these flags to either 0 or 1, which does not scale well for future flag
additions.

Some of these flags have associated enumerations to be used for assignment,
some do not. CAN drivers and protocols tend to rely on the logical value of
the flag instead of using the enumeration, leading to a very fragile
API. The enumerations are used inconsistently between the can_frame and
can_filter structures, which further complicates the API.

Instead, convert these flags to bitfields with separate flag definitions
for the can_frame and can_filter structures. This API allows for future
extensions without having to revisit existing users of the two
structures. Furthermore, this allows driver to easily check for unsupported
flags in the respective API calls.

As this change leads to the "id_mask" field of the can_filter to be the
only mask present in that structure, rename it to "mask" for simplicity.

Fixes: #50776

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-10-25 16:32:10 +02:00
Kumar Gala
a1195ae39b smp: Move for loops to use arch_num_cpus instead of CONFIG_MP_NUM_CPUS
Change for loops of the form:

for (i = 0; i < CONFIG_MP_NUM_CPUS; i++)
   ...

to

unsigned int num_cpus = arch_num_cpus();
for (i = 0; i < num_cpus; i++)
   ...

We do the call outside of the for loop so that it only happens once,
rather than on every iteration.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-21 13:14:58 +02:00
Kumar Gala
4f0166088c tests: move to using CONFIG_MP_MAX_NUM_CPUS
For tests that set CONFIG_MP_NUM_CPUS, switch to using
CONFIG_MP_MAX_NUM_CPUS instead as we work to phase out
CONFIG_MP_NUM_CPUS.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-20 22:04:10 +09:00
Hu Zhenyu
3cef8e68df tests: drivers: disk: Replace the MAX function with if and else
As the parameter of "MAX" is uint32, the nagetive number will be
bigger than 0. The MAX function does not work as expected. So
change it to if/else form.

Fixes #51146

Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
2022-10-18 21:11:21 -04:00
Francois Ramu
31afbf7902 tests: drivers: eeprom testing on stm32 platforms
Add the testcase for running the test of the
stm32 eeprom driver on stm32 platforms like the nucleo_l152re
or nucleo_l073rz boards.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-10-17 14:41:01 +09:00
Martin Jäger
2fd5cbdaf4 tests: drivers: can: api: add twai build-test for esp32c3
The TWAI peripheral needs a connected CAN transceiver also for testing
in loopback mode.

As there is no board available with this configuration, at least make
sure the CAN API test is built in CI for esp32c3_devkitm.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-10-14 09:55:09 +02:00
Manuel Arguelles
2c62966621 tests: gpio: add overlays for s32z270dc2_r52 boards
Enable testing of GPIO driver minimal API's on s32z270dc2_r52 boards.
These boards do not have built-in user LED, therefore a GPIO pin is used
instead.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-10-14 09:51:14 +02:00
Gerard Marull-Paretas
6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Maciej Perkowski
9018338863 tests: drivers: flash: Fix nrf_qspi_nor_4B_addr requirements
The test requires external memory connected but it was not
reflected in the yaml decription. Therefore, the test was failing
instead of being skipped. It is the same story as with #47241

Signed-off-by: Maciej Perkowski <Maciej.Perkowski@nordicsemi.no>
2022-10-04 19:16:37 +00:00
Lucas Tamborrino
9bfa83f441 tests: drivers: spi loopback test for DMA on ESP32C3
Add SPI DMA test mode.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
Lucas Tamborrino
af47b9b34b tests: drivers: spi loopback test for DMA on ESP32/S2
Add SPI DMA test mode.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
TOKITA Hiroshi
6bbd2b2d06 tests: drivers: watchdog: Add support for GD32 SoCs
Enable watchdog tests for boards that implement GD32 SoC.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-10-03 18:07:16 +02:00
Andriy Gelman
072a428f78 drivers: flash: Add xmc4xxx flash drivers
Add xmc4xxx flash drivers.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2022-10-03 13:56:49 +02:00
Josia Strack
ba7eb1025a drivers: gpio: Add driver for pcf8574
Adds a driver for pcf8574 via i2c.

Signed-off-by: Josia Strack <josia.strack@ithinx.io>
2022-10-03 13:56:32 +02:00
Martin Jäger
9cec058e8e boards: posix: native_posix: enable can_loopback0 by default
The .yaml file states that CAN is supported, but the basic sample
application samples/drivers/can/counter cannot be compiled without
additional configuration.

The loopback driver does not require any additional steps like the
linux SocketCAN driver, so it is safe to enable it by default and
get rid of the many overlay files in the tests.

ISO-TP tests and the counter sample are excluded via .yaml from
twister tests because of timing issues.

Signed-off-by: Martin Jäger <martin@libre.solar>
2022-10-03 10:17:12 +02:00
Ryan Erickson
46045e6df0 tests: ADC API: Add support for MG100 board
MG100 board added to ADC API tests.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-10-03 10:11:28 +02:00
Ryan Erickson
a16fb03608 tests: modem: build_all: Add MG100 board exclusions
Add MG100 board to test exclusions where necessary.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2022-10-03 10:11:28 +02:00
Enjia Mai
cce22da0bc tests: drivers: pwm: move the pwm_loopback test to new ztest API
Migrate the testsuite tests/drivers/pwm/pwm_loopback to the new
ztest API.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-10-03 10:10:15 +02:00
Enjia Mai
08a7b3e421 tests: drivers: pwm: move the pwm api test to new ztest API
Migrate the testsuite tests/drivers/pwm/pwm_api to the new
ztest API.

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-10-03 10:10:15 +02:00
Ederson de Souza
edd524b4e3 drivers/mm: Add API to query memory regions
Some systems may need to query the available memory regions in runtime.
For those, this patch adds a simple API that memory management drivers
can implement to provide such discovery.

A small test also added to exercise the default, empty implementation.

Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
2022-10-01 14:52:29 -04:00
Henrik Brix Andersen
707fa6a1f6 tests: drivers: can: api: skip RTR tests if not supported
Skip the Remote Transmission Request (RTR) frame tests if the CAN
controller driver does not support RTR filters.

Fixes: #50218

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-21 08:50:47 +00:00
Sylvio Alves
7891bed6e7 tests: counter: add esp32 test case
Adds only ESP32 board test case.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-19 18:37:28 +02:00
Enjia Mai
4c9faf95ef tests: driver: gpio: fix the incorrect testsuite names
There are some erros in previous ztest API migration of
the gpio_basic_api tests. Fix the incorrect testsuite
name of the callback mgmt and vari tests.

Fixes: #49953

Signed-off-by: Enjia Mai <enjia.mai@intel.com>
2022-09-19 09:34:36 +00:00
Hu Zhenyu
9fd919a466 tests: drivers: i2s: i2s_speed: move to new ztest API
Move drivers i2s_speed tests to use new ztest API

Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
2022-09-16 08:35:36 +00:00
Hake Huang
0d4ff38fa2 tests: adc-dma: fix the dma dest address check failure
force the dma destintion address 32 bit aligned

fixing: #49792

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2022-09-15 14:16:48 -05:00
Lauren Murphy
85445474f2 boards, dts: fix filenames and dts refs for adsp clock
Changes filenames and DTS references from CAVS clock to
ADSP clock.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-09-14 07:23:08 -04:00
Francois Ramu
5aedd860f5 tests: drivers: adc stm32wb and stm32l5 start on channel1
Start testing adc_api on channel 1
for stm32w55 nucleo and stm32l562 disco boards
since the VREFINT on channel 0

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-14 09:30:43 +00:00
Henrik Brix Andersen
b4af14600a tests: drivers: can: shell: add tests for start/stop shell commands
Add tests for the CAN controller start/stop shell commands.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-13 16:06:50 +00:00
Henrik Brix Andersen
6cdb418e5d tests: drivers: can: fd: test returned error codes when started/stopped
Add tests for the required error return codes when the CAN controller is
started/stopped.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-13 16:06:50 +00:00
Henrik Brix Andersen
94d37023c6 tests: drivers: can: api: test returned error codes when started/stopped
Add tests for the required error return codes when the CAN controller is
started/stopped.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-13 16:06:50 +00:00
Henrik Brix Andersen
180cdc105e drivers: can: add start and stop CAN controller API functions
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.

This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().

During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.

Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.

Fixes: #45304

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-13 16:06:50 +00:00
Henrik Brix Andersen
6d094d0ad5 tests: drivers: can: api: add missing test case documentation
Add missing CAN controller API test case documentation.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-09-13 16:06:50 +00:00
Thomas Stranger
1c411cc7f0 tests: drviers: remove superfluous source files
During rebase two test main source files, that were removed during the
transition to the new ztest api, were accidetally added again.

First Removed in #49509 and #49554.
This commit removes them again.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2022-09-12 10:54:18 +00:00