Adds the dma transfer for the SPI loopback test
for the b_u585i_iot02a disco kit and nuceo_u575zi_q.
GPDMA1 is the DMA instance
Connect pins on the target board D11 <--> D12 of the CN13
Signed-off-by: Francois Ramu <francois.ramu@st.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define the overlay to run the tests/drivers/spi/spi_loopback/
on the nucleo_f746zg board.
The DMA 2 is used for spi1 transfer.
Like on nucleo_f767zi, connect pin D11 to D12 (SPI1 MOSI to MISO)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit remove the use of the Dcache for stm32f7x
boards when running the tests on SPI with DMA.
Add the -- -DOVERLAY_CONFIG=overlay-stm32-spi-dma.conf
to run the test and connect SPI MOSI to MISO on the hw.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.
The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.
The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
* Move test to using devicetree for various "device" params.
* Move test to using spi_dt_spec to simplify code
Signed-off-by: Kumar Gala <galak@kernel.org>
Add a bunch of missing "zephyr/" prefixes to #include statements in
various test and test framework files.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
SYSCLK frequency is 160MHz therefore w/o overlayfile the
slow frequency can only be reached with the divider added
by this commit in the overlay.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Move the RX (MISO) delaying capability information to Devicetree. It is
done using 2 properties:
- rx-delay-supported: enabled on SPI nodes that support delaying RX.
This property can be used by the driver to determine if this
capability is supported or not on a given instance.
- rx-delay: the actual RX delay value
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Specify the overrun character in Devicetree. Since 0xFF is the most
common value, DT property contains such default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
uart_async test and spi_loopback test require UART and SPI
with an ASYNC option.
The SAM0 UART/SPI driver requires configuring DMA support.
Arduino MKRZero is not DMA configured like other SAM0 boards.
We exclude it from the tests.
ea36f9b and f4c5bdf already exclude other SAM0 boards from these tests.
Arduino MKRZero also followed these PR policies.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Enable access to the HS_SPI pins(JP26) on the mimxrt595_evk board.
Using DMA mode, tested with spi_loopback testcase.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
As the SPI_SLAVE define is used by some HAL (e.g. the gigadevice HAL),
SPI_SLAVE has been renamed to SPI_SLAVE_NUMBER.
Signed-off-by: Sebastien Bourdelin <sebastien.bourdelin@rtone.fr>
The initialized test buffers tx_data and tx2_data were not given a
specific size, but were initialized with one more byte than the
uninitialized buffers they get copied to. As a result, the memcpy found
a buffer overflow. Fix this by setting the source buffer sizes to match
the destination.
Signed-off-by: Keith Packard <keithp@keithp.com>
Since implementation of clock source selection in consumer device drivers
could be achieved without usage of a clock-names property and no
example of usage is provided up to now, remove this property from existing
examples.
Additionally, make it clear in stm32 clock control binding that it is
driver's responsibility to correctly access clock source information
and use it as required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the gpio_dt_spec fields of `struct spi_cs_control`, instead of the
deprecated individual fields.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The SAM spi driver depends on GPIO driver to work. It seems that this
dependency chain it is not handled. This select GPIO driver when SPI
driver is enabled. It rework GPIO and SPI Kconfig to select driver by
devicetree and drop entries at Kconfig.defconfig.series file.
Fixes#41525
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The testcase is including a generic configuration conf
for the stm32 target boards when running the SPI loopback in
interrupt and DMA mode. Thus, the board specific conf file is useless.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds two stm32 config to execute the testcase
when the SPI is using interrupt mode for transfer.
when the SPI is using DMA for transfer (not Interrupt nor ASYNC mode).
to run the on some specific (listed) stm32 boards on SPI instance.
Note the hw fixture (physical connection on the board)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
with this config, the testcase PASSED on the nucleo_h743zi
using DMA for SPI transfer (through DMAMUX request)
Connect pins D11 and D12 on the ARDUIno connector CN7
Signed-off-by: Francois Ramu <francois.ramu@st.com>
connect SPI1 MISO pin D12 (pa6) on SPI1 MOSI pin D11 (pa7)
on the ARDuino connector CN5 of the nucleo board
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for LPSPI DMA mode on RT1064, RT1060, RT1050, RT1024,
RT1020, RT1015, and RT1010 evaluation boards. Update tests to match.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support of the tests/drivers/spi/spi_loopabck
with dma (V1).
Connect MISO pin (D12) to MOSI (D11) pin on the board
to pass the test.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch is defining Tx buffers in NON CACHE memory for using
with DMA transfers. This requires the CONFIG_NOCACHE_MEMORY=y
flag when mcu is using CACHE.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds SPI support on LPSPI1 to the RT1010. LPSPI1 is available on pins
6, 8, 10, and 12 of J57 on the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit enables the LPSPI1 peripheral on the RT1015 EVK. LPSPI pins
are not populated by default, but headers can be added to J19 on the EVK
to access these signals
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for LPSPI to mimxrt1024_evk. LPSPI1 is exposed on pins
6,8,10, and 12 of J19 of the evaluation board
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing,
and requires that the board have solder jumpers R278, R279, R280,
and R281 bridged.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SPI support is available on LPSPI1 and LPSPI3. Both of these require
board modifications to expose headers. LPSPI1 is used for testing, and
requires that the board have solder jumpers R278, R279, R280, and R281
bridged.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT1050 has multiple LPSPI peripherals. The simplest to access is LPSPI1,
which can be connected by bridging solder jumpers on the board. Enable
this SPI peripheral, and set it as default for SPI tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Configure the target board to PASS the test case.
The PCLK2 clock feeding the SPI1 is reduced by 2 (apb2 prescaler)
to accept the slow freq config.
The SPI1 MISO and MOSI pins are linked on the HW board
(on arduino CN13, D11 & D12)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move to CMake 3.20.0.
At the Toolchain WG it was decided to move to CMake 3.20.0.
The main reason for increasing CMake version is better toolchain
support.
Better toolchain support is added in the following CMake versions:
- armclang, CMake 3.15
- Intel oneAPI, CMake 3.20
- IAR, CMake 3.15 and 3.20
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
