Commit Graph

315 Commits

Author SHA1 Message Date
Andrew Boie
96571a8c40 kernel: rename NANO_ESF
This is now called z_arch_esf_t, conforming to our naming
convention.

This needs to remain a typedef due to how our offset generation
header mechanism works.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
5623637a48 kernel: abolish _default_esf
NANO_ESF parameters may now be NULL, indicating that no
exception frame is available.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Andrew Boie
71ce8ceb18 kernel: consolidate error handling code
* z_NanoFatalErrorHandler() is now moved to common kernel code
  and renamed z_fatal_error(). Arches dump arch-specific info
  before calling.
* z_SysFatalErrorHandler() is now moved to common kernel code
  and renamed k_sys_fatal_error_handler(). It is now much simpler;
  the default policy is simply to lock interrupts and halt the system.
  If an implementation of this function returns, then the currently
  running thread is aborted.
* New arch-specific APIs introduced:
  - z_arch_system_halt() simply powers off or halts the system.
* We now have a standard set of fatal exception reason codes,
  namespaced under K_ERR_*
* CONFIG_SIMPLE_FATAL_ERROR_HANDLER deleted
* LOG_PANIC() calls moved to k_sys_fatal_error_handler()

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-07-25 15:06:58 -07:00
Anas Nashif
e001c9aadc arch: x86: remove unused NANO_ISF
This structure is not being used anywhere.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-07-04 10:04:27 -04:00
Charles E. Youse
7c2d7d7b69 arch/x86: move arch/x86/include/mmustructs.h to ia32/mmustructs.h
For now, only the 32-bit subarchitecture supports memory protection.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-03 20:01:17 -04:00
Charles E. Youse
0325a3d972 arch/x86: eliminate include/arch/x86/irq_controller.h
The MVIC is no longer supported, and only the APIC-based interrupt
subsystem remains. Thus this layer of indirection is unnecessary.

This also corrects an oversight left over from the Jailhouse x2APIC
implementation affecting EOI delivery for direct ISRs only.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
15dac5b6ab arch/x86: update msr.h to be safe with CONFIG_X86_LONGMODE
Don't allow inadvertent use of the existing z_x86_msr_read() when
compiled in long mode (CONFIG_X86_LONGMODE) as it won't work.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
7f0ab527e3 arch/x86: move 32-bit linker script to ia32/ directory
No functional changes. All references in soc/ are updated.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
c384c6685e arch/x86: move include/arch/x86/sys_io.h to ia32/sys_io.h
These inlines currently only apply to IA32, so place accordingly.
Minor changes to direct and indirect users of the file for ordering.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
ef4eb300bf arch/x86: merge include/arch/x86/asm_inline.h into arch.h
This file is only included from arch.h, so merge it into same. This
also avoids confusion with files in arch/x86/include/ of the same name.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
a039bec3c7 arch/x86: remove arch-specific ffs.h, rely on compiler built-ins
The compiler is going to make better per-arch/per-implementation
choices about bit operations, so let's use the common definitions.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
930e6af999 arch/x86: move include/arch/x86/segmentation.h to ia32/segmentation.h
This header is currently IA32-specific, so move it into the subarch
directory and update references to it.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
dff016b53c arch/x86: move include/arch/x86/arch.h to ia32/arch.h
Making room for the Intel64 subarch in this tree. This header is
32-bit specific and so it's relocated, and references rewritten
to find it in its new location.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
c4175e9106 arch/x86: move arch/x86/syscall.h to arch/x86/ia32/syscall.h
This file is currently IA32-specific, so it is moved and the
reference to it at the arch-independent layer is moved.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
6f3009ecf0 arch/x86: move include/arch/x86/asm.h to include/arch/x86/ia32/asm.h
This file is 32-bit specific, so it is moved into the ia32/ directory
and references to it are updated accordingly.

Also, SP_ARG* definitions are no longer used, so they are removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
c7bc7a8c86 arch/x86: clean up model-specific register definitions in msr.h
Eliminate definitions for MSRs that we don't use. Centralize the
definitions for the MSRs that we do use, including their fields.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Charles E. Youse
8a8e6a1e52 arch/x86: merge asm_inline_gcc.h with asm_inline.h
This pattern exists in both the include/arch/x86 and arch/x86/include
trees. This indirection is historic and unnecessary, as all supported
toolchains for x86 support gas/gcc-style inline assembly.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-07-02 19:30:00 -04:00
Anas Nashif
a2fd7d70ec cleanup: include/: move misc/util.h to sys/util.h
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
ef281c4237 cleanup: include/: move sys_io.h to sys/sys_io.h
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Anas Nashif
0eee0a3c6c drivers: apic_timer: fix include of system_timer.h
Fix path for system_timer.h and loapic.h, we moved it to
include/drivers/timer/ and include/drivers/interrupt_controller/

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 10:51:32 -07:00
Anas Nashif
43a49335f4 include: move interrupt controller headers to interrupt_controller/
Move internal and architecture specific headers from include/drivers to
subfolder for interrupt_controller:

include/drivers/interrupt_controller/

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-25 15:27:00 -04:00
Charles E. Youse
a506aa3dfb arch/x86: remove CONFIG_X86_FIXED_IRQ_MAPPING support
This was only enabled by the MVIC, which in turn was only used
by the Quark D2000, which has been removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Charles E. Youse
3dc7c7a6ea drivers/interrupt_controller/mvic.c: remove MVIC interrupt controller
The Quark D2000 is the only x86 with an MVIC, and since support for
it has been dropped, the interrupt controller is orphaned. Removed.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-25 08:06:43 -04:00
Charles E. Youse
ef736f77c2 arch/x86: relocate and rename SYS_X86_RST_* constants
These constants do not need global exposure, as they're only
referenced in the reboot API implementation. Also their names
are trimmed to fit into the X86-arch-specific namespace.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-24 07:46:24 -07:00
Charles E. Youse
8013277cd6 arch/x86/Kconfig: remove CONFIG_CMOV
The only we support cores that don't have CMOV insns are the MINUTEIAs,
so we simply check for that rather this using a layer of indirection.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-14 05:49:13 -04:00
Ioannis Glaropoulos
d840d1cbb5 arch: implement arch-specific float disable routines
This commit adds the architecture-specific implementation
of k_float_disable() for ARM and x86.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2019-06-12 09:17:45 -07:00
Charles E. Youse
9a1e92735c drivers/interrupt_controller/loapic_intr.c: enable x2APIC support
When CONFIG_X2APIC is enabled, twiddle the appropriate MSR during
initialization to enable x2APIC mode.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-08 15:41:36 -04:00
Charles E. Youse
53b370a7c6 arch/x86: add x2APIC-aware accessors for local APIC access
MSRs related to x2APIC will never be accessed directly by name, but
rather via an offset from a base MSR, so the definitions are removed
from msr.h.

New local APIC accessor functions, which are sensitive to xAPIC vs
x2APIC mode (CONFIG_X2APIC), are added to include/drivers/loapic.h.
These accessors use the MSR definitions as modified above.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-08 15:41:36 -04:00
Charles E. Youse
ba516e8ea8 arch/x86: do not redefine MSR regs in crt0.S
The real-mode startup code is trivially changed to refer to MSR
definitions in include/arch/x86/msr.h, rather than its ad-hoc ones.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-08 15:41:36 -04:00
Charles E. Youse
0e166fa2a8 arch/x86: move MSR definitions to include/arch/x86/msr.h
Light reorganization. All MSR definitions and manipulation functions
are consolidated into one header. The names are changed to use an
X86_* prefix instead of IA32_* which is misleading/incorrect.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-08 15:41:36 -04:00
Charles E. Youse
4c63e29aec arch/x86: drivers/display: add framebuffer driver w/ multiboot support
A basic display driver is added for a generic 32-bpp framebuffer.
Glue logic is added to the x86 arch to request the intitialization
of a linear framebuffer by the Multiboot loader (GRUB) and connect
it to this generic driver.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-06 10:47:29 -07:00
Charles E. Youse
a1a3a4fced arch/x86: add support for Multiboot boot information structure
When booting using GRUB, some useful information about the environment
is given to us via a boot information structure. We've not made any
use of this information so far, but the x86 framebuffer driver will.

A skeletal definition of the structure is given, and provisions are
made to preserve its contents at boot if the configuration requires it.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-06 10:47:29 -07:00
Anas Nashif
d647751bbc include: arch: move addr_types to common location
All architectures declare those variables the same way, no need to
define them per arch, instead put them in common. If someone deviates,
they can create their own header.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-03 21:09:24 -04:00
Anas Nashif
b01568c2cd include: arch: move bits_portable.h to arch/common
We had architectures doing this differently, some had a dedicated
sys_io.h file, some not. Unify how it is done by splitting the arch
specific sys_io implementation into a sys_io file and include it
instead.

Move bits_portable.h to arch/common and split the file so more
architecture can reuse some of the definitions here instead of
duplicating code.

Where applicable use the common sys_io/ffs definitions.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-03 21:09:24 -04:00
Andy Ross
e6af0f8caa arch/*: Add z_arch_irq_unlocked() predicate and test
It's useful to be able to inspect the key returned from
z_arch_irq_unlock() to see if interrupts were enabled at the point
where z_arch_irq_lock() was called.  Architectures tend to represent
this is a simple way that doesn't require platform assembly to
inspect.

Adds a simple test to kernel/common that validates this predicate with
a nested lock.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-06-03 12:03:48 -07:00
Anas Nashif
76d9d7806d x86: remove unused and x86 only latency benchmark
We do have a multi-architecture latency benchmark now, this one was x86
only, was never used or compiled in and is out-dated.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-03 09:42:00 -07:00
Wentong Wu
82d703debc testsuite: coverage: port GCOV linker code to CMake for X86
port GCOV linker code to CMake for X86 platfrom, from linker.ld
to coverage_ram.ld.

Fixes: #16501.

Signed-off-by: Wentong Wu <wentong.wu@intel.com>
2019-05-31 10:49:19 -04:00
Øyvind Rønningstad
f2a1572ac2 cmake: Add function for adding snippets to the linker file
Allows snippets to be placed in different locations:
 - The noinit, rwdata and rodata output sections
 - Two different locations for placing custom output sections,
   one location for RAM and another for all other sections.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2019-05-20 22:28:28 -04:00
Patrik Flykt
7c0a245d32 arch: Rename reserved function names
Rename reserved function names in arch/ subdirectory. The Python
script gen_priv_stacks.py was updated to follow the 'z_' prefix
naming.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Patrik Flykt
97b3bd11a7 drivers: Rename reserved function names
Rename reserved function names in drivers/ subdirectory. Update
function macros concatenatenating function names with '##'. As
there is a conflict between the existing gpio_sch_manage_callback()
and _gpio_sch_manage_callback() names, leave the latter unmodified.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Patrik Flykt
24d71431e9 all: Add 'U' suffix when using unsigned variables
Add a 'U' suffix to values when computing and comparing against
unsigned variables.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-28 17:15:58 -05:00
Flavio Ceolin
b2b4f09bed include: Add U for unsigned constants
Add U for integer constants to avoid an implicit cast.

MISRA-C rule 10.1

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2019-03-26 14:31:29 -04:00
Flavio Ceolin
063a9ce8c3 include: Make statements evaluate boolean expressions
MISRA-C requires that the if statement has essentially Boolean type.

MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2019-03-26 14:31:29 -04:00
Flavio Ceolin
39a50f6392 arch: x86: Use proper essential types in operands
MISRA defines a serie of essential types, boolean, signed/unsigned
integers, float, ... and operations must respect these essential types.

MISRA-C rule 10.1

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2019-03-26 14:31:29 -04:00
Andrew Boie
575abc0150 kernel: add K_THREAD_STACK_RESERVED
This is used to have each arch canonically state how much
room in the stack object is reserved for non-thread use.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-20 13:59:26 -07:00
Kumar Gala
4da0f8b796 linker: Remove unused (OPTIONAL) from linker scripts
(OPTIONAL) was a vestiage from the initial import of the Zephyr code
base and we dont utilize it with the GNU linker.  Additionally, the way
(OPTIONAL) gets defined to nothing creates a linker script that lld
(from llvm) doesn't like.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-15 06:42:02 -05:00
Patrik Flykt
4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Andrew Boie
d3c89fea4f kernel: move CONFIG_RETPOLINE definition
Retpolines were never completely implemented, even on x86.
Move this particular Kconfig to only concern itself with
the assembly code, and don't default it on ever since we
prefer SSBD instead.

We can restore the common kernel-wide CONFIG_RETPOLINE once
we have an end-to-end implementation.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-03-01 12:35:04 -08:00
Andrew Boie
4ce652e4b2 userspace: remove APP_SHARED_MEM Kconfig
This is an integral part of userspace and cannot be used
on its own. Fold into the main userspace configuration.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-23 07:43:55 -05:00
Sebastian Bøe
d515315a86 ld: Change the name of input section irq_vectors_alloc_data
The arch/x86/CMakeLists.txt build scripts names five sections that are
generated from .bin files. Two of them are named the same as the .bin
file, and the other three are named inconsistently.

To be consistent, we will rename the three that are named inconistenly
to align with the two that are named as the .bin file.

Being consistent simplifies the system and fosters code-reuse.

This patch renames irq_vectors_alloc_data.

Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
2019-02-19 10:00:14 -08:00