As we now have PPP support, use more generic "serial-net" string instead
of "slip" when setting what kind of networking the board supports.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Expose eSPI block with interrupts enabled for channel 0 & 1
eSPI handshake has been tested using espi driver sample app
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Add a kernel timer driver for the MEC1501 32KHz RTOS timer.
This timer is a count down 32-bit counter clocked at a fixed
32768 Hz. It features one-shot, auto-reload, and halt count down
while the Cortex-M is halted by JTAG/SWD. This driver is based
on the new Intel local APIC driver. The driver was tuned for
accuracy at small sleep values. Added a work-around for RTOS
timer restart issue. RTOS timer driver requires board ticks per
second to be 32768 if tickless operation is configured.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This was always intended to be a bytestring rather than an array, but
full support was missing. Since that has been addressed switch it to
the preferred format.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Particle released documentation with a pre-release flash chip. Correct
the name to the actual as-sold device, and add the corresponding size
property as well as the has-be32k property. Also add an alias so we
can set partitions externally.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The JEDEC API defines the hardware page, sector, and block sizes.
Deprecate the Kconfig settings, remove the `erase-size-block` property,
and add `has-be32k` to indicate that 32K-byte erase is supported.
Rework the driver to use the constants instead of configured values.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The property is required on all SPI clients, but was missing from
several devicetree nodes. Set it, using the capitalized version of the
node alias when present, with "jedec,spi-nor#0" as the fallback.
Closes#17662
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The binding for arm,cmsdk-timer requires a label so add it into the dts
since its missing on v2m_musca_b1.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The bindings for arm,cmsdk-{d}timer requires a label so add it into the
dts since its missing on mps2_an521.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
spi-max-frequency is marked as required in
dts/bindings/mtd/jedec,spi-nor.yaml.
I took the value from the datasheets (133 MHz for all), and guessed that
a dummy entry is fine for QEMU.
Fixes some errors in
https://github.com/zephyrproject-rtos/zephyr/issues/17532.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Activate the DTCM for STM32F7 board that have Ethernet.
This is needed because the Ethernet driver puts the DMA buffer
to this section.
Signed-off-by: Alexander Wachter <alexander.wachter@student.tugraz.at>
This commit adds a fixed clock node (representing clock driving
system bus). The added node is then referenced by peripherals requiring
information about driving clock frequency.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit adds 'clock-frequency' property to the cpu nodes.
The clock frequency specified in the added property is used
during platform configuration. Examples:
- The SWO logger uses clock frequency to configure SWO output.
- Plenty of platforms need CPU clock specified for their HAL.
- Most of devices with USB needs information about CPU clock
in order to configure USB clock source.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
When TRUSTED_EXECUTION_NONSECUCRE is selected, we always
define the default board (mps2_an521). We do not need to
OR with TRUSTED_EXECUTION_SECURE, in this Kconfig
conditional.
In addition to that, we make the BOARD_MPS2_AN521 board
to strictly depend on the corresponding SOC, not on the
SOC series.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Signify that the MPS2 AN521 is selected as a QEMU
target. Indicate, also, that this board has support
for COVERAGE.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
CONFIG_ARCH_HAS_USERSPACE is automatically set for
Cortex-M targets with CONFIG_ARM_MPU being set. So
we can remove this from the default setup since it
is redundant.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The spi-nor flash nodes require a jedec-id property as per the binding.
We add the jedec-id's as best we can determine based on the data sheets
for the various flash modules on these boards.
However these id's should be validated by actually reading the value to
ensure they are correct.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove whitelisting and enable broader testing on all boards with needed
features.
Add pwm to board yaml where it applies.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This board uses the sam3 gpio driver. gpio_sam was selected by default
causing a conflict and issues when building for this board.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
holyiot_yj16019 board uses nRF52832 SoC, which does not have 802.15.4
radio. Therefore, 802.15.4 should not be listed in it's capabilities.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
At the time these overlays were created the author was unclear on how to
correctly represent SPI chip selects on a target where the peripheral
does not control that signal. As such the pin assignment was present
only as documentation.
Enlightenment was subsequently achieved and the cs-gpios property should
be properly defined.
Note that the mesh feather does not define a chip select to be used with
the spi1 peripheral.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use an assert to catch the situation where we can't find a port
to use for the reset line pin, since it shouldn't really happen.
The case where reset_pin_configure() is executed but no reset
line is selected can't happen due to static asserts in `integrity.c`
that enforce a reset line to be selected when the reset pin
functionality is enabled.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Implementation of pinmux of usdhc depends on board design.
Usdhc driver could change pinmux according to SD mode, SoC
should provide API for this. Board pinmux should register
its pinmux function to SoC.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
1) dts/bindings/mmc/mmc.yaml: specifies common mmc.
2) dts/bindings/mmc/nxp,imx-usdhc.yaml: specifies
nxp usdhc module which inherits mmc.
3) dts/arm/nxp/nxp_rt.dtsi: usdhc support on RT chip.
4) boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts:
usdhc slot support on mimxrt1050_evk board.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
Enables the pyocd runner on the lpcxpresso55s69 board. Note that this
currently requires building pycod from source to pick up fixes in
https://github.com/mbedmicro/pyOCD/pull/690
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts all net samples that enable the mcr20a 802.15.4 driver to use
the frdm_cr20a shield instead of hardcoding configs for the frdm_k64f
base board. This makes it possible to build mcr20a samples for other
base boards with compatible arduino headers.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Match the speed speficied for all boards using the jlink runner when
using the pyocd runner on the same board.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This patch adds support for the STM32 nucleo_g071rb board
from STMicroelectronics.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove unnecessary MCU slow down to 16Mhz when using BLE chip BlueNRG-MS
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
