Calling pwm_pin_set_cycles with a pulse > period doesn't make sense. By
definition, pulse ranges from 0 up to the period value.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Expand API to allow additional eSPI driver callbacks coming from
eSPI peripheral channel.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
XCC (which is based on GCC 4.2) needs the initializer of one of the
union elements to be enclosed in brackets.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Indicate wether pointer parameters are input or output. This information
is useful for API users.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some values are limited to 32-bit, UINT32_MAX can be used to check if
they overflow.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Group all capture APIs together for better readability. Previous to this
patch, get_cycles() as placed at the end.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not convert get_cycles_per_sec() failures to -EIO, just propagate the
failure code since the failure is not handled. As a consequence, all
Doxygen docstrings have been updated.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Hide all API ops (typedefs and struct) under INTERNAL_HIDDEN. This is
information required by drivers only, not API clients.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
When using DMA with a circular buffer an application needs to know
where the hardware is in terms of its read and/or write positions.
Without this information, the circular buffer isn't very useful!
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add 8 bits to the pwm_flags_t so that upper byte is reserved
for non-standard but soc specific dts flags and keeping the low
Byte for standard flags.
Some of SoC like STM32 mcus can then define their own flags
in their dt-bindings/pwm.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Convert can_calc_timing() + can_calc_timing_data() to syscalls and use
the newly added syscalls calls for determing the minimum/maximum
supported timing parameter values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add CAN system calls for getting the minimum/maximum timing values
supported by a given CAN controller device driver instance:
- can_get_timing_min()
- can_get_timing_max()
- can_get_timing_min_data()
- can_get_timing_max_data();
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Adds to the dma_status struct the number of free bytes available
in the current transfer buffer.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Adds a bit flag config option for cyclic transfer lists, where the
transfer list tail may link to its head creating a never ending
loop of transfer descriptors.
DesignWare DMA supports such cyclic transfers.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Define the MSI/MSI-X APIs to be used with the Generic PCIe Controller API.
It notably adds the msi_device_setup() callback to the PCI Express
Controller API used to allocate and setup the MSI/MSI-C vectors on the
MSI message translater HW.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add get_msi_addr() callback to ITS API to retrieve the GITS_TRANSLATER
physical address to be set in the MSI message address field.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This update current Atmel sam0 pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam0
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update current Atmel sam pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Remove redundant @typedef doxygen commands from the CAN API
documentation. These doxygen commands are only needed if documenting a
typedef separate from its declaration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
added API and syscalls for reset controller
added reset controller devicetree macro public API header file
Signed-off-by: Andrei-Edward Popa <andrei.popa105@yahoo.com>
the tlc5971 driver uses spi for controlling the global brightness
and individiual pixel brightness of a daisy chain of tlc5971
devices.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
So far the I2C channel connected to the battery has chosen the option
of Standard-mode 100KHz, but according to the SI(Signal Integrity)
test report, the I2C channel doesn’t meet the tHD;DAT Margin/Threshold
in the SI test. In fact, the timing could be adjusted by changing the
settings in the related timing registers in EC, but unfortunately the
limitation exists due to the fact that the timing registers have been
currently occupied by another channel for the same reason, that is,
adjusting the timing.
However, according to the I2C specification, the Standard-mode (Sm)
has a bit rate up to 100 kbit/s, so far the battery use the option
of standard mode 100KHz in the SMCLK setting register. This SMCLK
setting register also provides standard mode 50KHz for usage.
According to another SI test reports, so far the Standard-mode 50KHz
setting looks good in the SI test.
Therefore, add a #define I2C_SPEED_DT allows the device tree to
write a specified speed without causing i2c_configure() and
i2c_get_config() to return error.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Include a pointer to the CAN controller device for the CAN
transmit, receive, and state change callback functions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The LoRa and LoRaWAN documentation was not included anywhere, so the
Doxygen comments in drivers/lora.h and lorawan/lorawan.h were not
rendered. This commit adds a new section for LoRa and LoRaWAN to the
documentation.
People often confuse the difference between LoRa and LoRaWAN, so it
makes sense to combine both in the same doc section.
LoRa would otherwise not fit very well into any docs category, as it
is a driver, but not really a peripheral.
Signed-off-by: Martin Jäger <martin@libre.solar>
Fix hwinfo documentation claiming API returns ENOTSUP for
unimplemented functions, with the correct ENOSYS
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Move the can_set_bitrate() function to can_common.c as it is getting
quite long for a static inline function.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for getting the maximum supported bitrate in bits/s for CAN
controller/transceiver combination and check that a requested bitrate is
within the supported range.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reserve the upper 8 bits of gpio_dt_flags_t for SoC specific flags and
move the non-standard, hardware-specific GPIO devicetree flags (IO
voltage level, drive strength, debounce filter) from the generic
dt-bindings/gpio/gpio.h header to SoC specific dt-bindings headers.
Some of the SoC specific dt-bindings flags take up more bits than
necessary in order to retain backwards compatibility with the deprecated
GPIO flags. The width of these fields can be reduced/optimized once the
deprecated flags are removed.
Remove hardcoded use of GPIO_INT_DEBOUNCE in GPIO client drivers. This
flag can now be set in the devicetree for boards/SoCs with debounce
filter support. The SoC specific debounce flags have had the _INT part
of their name removed since these flag must be passed to
gpio_pin_configure(), not gpio_pin_interrupt_configure().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
We emulate the interrupt by sending the IPI to core itself by
the local APIC for x86 platfrom.
But in X2APIC mode, this no longer works. So we emulate the
interrupt the by writing the IA32_X2APIC_SELF_IPI MSR to send
IPI to the core itself via LOAPIC also. According to SDM vol.3
chapter 10.12.11.
Fixes#42108
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
This commit adds the API for USB Type-C Port Controllers (TCPC) and support
Power Delivery (PD) structures
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Add STM32_FOO_ENABLED and STM32_FOO_FREQ to STM32 fixed clocks:
HSI, HSE, MSI(S), CSI, LSI, LSE..
Replace STM32_LSE_CLOCK by STM32_LSE_FREQ and when possible
replace by new STM32_LSE_ENABLED when making sense.
Fix STM32_PLL3_FOO_ENABLE to STM32_PLL3_FOO_ENABLED
Additionally, add STM32_PLL_FOO_ENABLED definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Tweak some macros definitions so that they can be used in
IS_ENABLED utility macro.
Finality is to rework STM32 clock_control driver to a more
readable format.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
