Provide more docs on ngpios and try and clarify the case if there are
holes in the GPIO slot range how ngpios should work.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In npcx7 series, there're 8 Pulse Width Modulator (PWM) modules and each
one support generating a single 16-bit PWM output. A 16-bit clock
prescaler (PRSCn) and a 16-bit counter (CTRn) determine the cycle time,
the minimal possible pulse width, and the duty-cycle steps.
Beside introducing pwm driver for Nuvoton NPCX series, this CL also
includes:
1. Add PWM device tree declarations.
2. Zephyr PWM api implementation.
3. Add aliases in npcx7m6fb_evb board device tree file for supporting
samples/basic/blinky_pwm application and pwm test suites
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add an emulation controller which routes SPI traffic to an attached
emulator. Only one emulator is supported per bus at present, since
chip-selction functionality is not present.
This allows drivers for SPI peripherals to be tested on systems that
don't have that peripheral attached, with the emulator handling the SPI
traffic.
Signed-off-by: Simon Glass <sjg@chromium.org>
In case a "required: False" enum binding doesn't mention a
default value, but a default value makes sense to be set in the code,
DT_ENUM_IDX_OR could be used to provide the default idx to be used.
New macro comes with appropriate tests.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Reused Linux bindings were using /* */ in some property description
fields.
This is not compatible with legacy device tree api which expands
these fields in commented sections of generated file
devicetree_legacy_unfixed.h resulting in compilation issue.
Seen when running tests/lib/devicetree/legacy_api.
Remove /* */ for now, waiting legacy api to be removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Generalize io-channels and io-channel-names devicetree node properties
and move their definitions to base.yaml. Keep binding specific
description where relevant.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This change allows to use SSD1306 based displays to be used on the
SPI bus as well.
Adding SPI shield.
Tested on SSD1306 and SSD1309 based displays using I2C.
Tested on SSD1309 based display using SPI.
Signed-off-by: Marco Peter <marco@peter-net.ch>
This CL adds more comments for each macro functions used for device tree
file for better explanations. It also changes all hex values in soc.c to
lower case.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL contains the drivers of NPCX Host Sub-Modules that serve as an
interface between the Host and Core domains. For most of them, the Host
can configure these modules via eSPI(Peripheral Channel)/LPC by
accessing 'Configuration and Control register Set' which IO base address
is 0x4E as default. And the interrupts in core domain help handling any
events from host side.
In this commit, we introduced six host sub-modules. It includes:
1. Keyboard and Mouse Controller (KBC) interface.
2. Power Management (PM) channels.
3. Shared Memory mechanism (SHM).
4. Core Access to Host Modules (C2H).
5. Mobile System Wake-Up functions (MSWC).
6. Serial Port (Legacy UART)
The tasks in application layer such as 8042, ACPI and host command can
cooperation with this driver by connecting api or callback functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.
Becisdes introducing eSPI device in npcx7, this CL also includes:
1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Provide yaml bindings for st,stm32f1-pinctrl copmpatible.
It differs from generic stm32 pinctrl bindings on the following points:
- Pinmux "function" parameter: Alternate, General output, Input, Analog
- Pinmux supports an additional "remap" parameter to encode potential
remapping configuration
- Bias configs only apply to input modes
- Drive and speed configs only apply to output modes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Allow to reconfigure UART baudrate on ESP and on host MCU, so a
non-default baudrate can be used for communication. This option helps
for example to increase network bandwidth without touching ESP chip
firmware.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Move pixel format setting (RGB565/RGB888) to DeviceTree. Add support for
changing pixel format at runtime.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Move the devicetree bindings for Analog-to-Digital Converters (ADCs)
from dts/bindings/iio/adc to dts/bindings/adc as Zephyr does not have
an IIO layer.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The host command peripheral device API abstracts how an embedded
controller sends and receives data from a host on a bus. Each bus like
eSPI, SPI, or I2C would implement their own host command peripheral
device. Each hardware device would then handle the necessary hardware
access to send and receive data over that bus.
The chosen host command peripheral device will be used by the host
command handler framework to send and receive host data correctly.
Signed-off-by: Jett Rink <jettrink@google.com>
The SX126x supports using DIO2 to control an TX switch, but only if
the switch can be operated using a single control signal. Add support
for RF switches that are wired to a GPIO instead of the radio chip
itself. This makes it possible to use RF switches that require two
control signals (one for the RX port and one for the TX port) by
wiring them to two GPIOs on the MCU.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
Add sector-size property to at45.yaml binding.
Different at45 flash memories have different sector sizes.
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
Add devicetree support to specify bias-pull-up, bias-pull-down, and
drive-open-drain for pin configuration.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Instantiate RTT UART instances from devicetree nodes instead of from
Kconfig symbols. While RTT is implemented using software, not hardware,
it is emulating a hardware device, and thus should be configured through
devicetree. This allows the simulated UART device to be selected via
devicetree aliases and chosen nodes.
The following devicetree snippet will instantiate RTT channels 0 and 2
as UART devices.
```
/ {
rtt0: rtt_terminal {
compatible = "segger,rtt-uart";
label = "rtt_terminal";
status = "okay";
};
rtt2: rtt_secondary {
compatible = "segger,rtt-uart";
label = "rtt_app_specific";
status = "okay";
};
};
```
Fixes the RTT portion of #10621.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add an emulation controller which routes I2C traffic to attached
emulators depending on the I2C address selected. This allows drivers
for I2C peripherals to be tested on systems that don't have that
peripheral attached, with the emulator handling the I2C traffic.
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This CL configures the UART wake-up event triggered from a falling edge
(START condition) on CR_SIN pin. It also includes:
1. Introduce wui_maps property in yaml file to present relationship
between Wake-Up Input (WUI) and UART device.
2. Implement wake-up mechanism by MIWU api functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Add gpio support for Nuvoton NPCX series. This CL includes:
1. Add GPIO device tree declarations.
2. Introduce wui_maps property in yaml file to present relationship
between Wake-Up
Input (WUI) and 8 IOs belong to the device.
3. Zephyr GPIO api implementation.
4. GPIO callback functions implementation with MIWU api functions.
5. Overlay file for gpio basic tests
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The device Multi-Input Wake-Up Unit (MIWU) supports the embedded
controller (EC) to exit 'Sleep' or 'Deep Sleep' power state which allows
chip has better power consumption. Also, it provides signal conditioning
such as 'Level' and 'Edge' trigger type and grouping of external
interrupt sources of NVIC. The NPCX series has three identical MIWU
modules: MIWU0, MIWU1, MIWU2. Together, they support a total of over 140
internal and/or external wake-up sources.
In this CL, we use device tree files to present the relationship bewteen
MIWU and the other devices in different npcx series. For npcx7 series,
it include:
1. npcx7-miwus-int-map.dtsi: it presents relationship between MIWU group
and NVIC interrupt in npcx7. Please notice it isn't 1-to-1 mapping.
2. npcx7-miwus-wui-map.dtsi: it presents relationship between input of
MIWU and its source device such as gpio, timer, eSPI VWs and so on.
This CL also includes:
1. Add MIWU device tree declarations.
2. MIWU api function declarations and implementation to configure signal
conditions and callback function mechanism. They can be be classified
into two types. One is for GPIO which connects original gpio callback
implemetation and the other is for generic devices such as timer,
eSPI, and so on.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The driver utilizes the CONFIG_NET_OFFLOAD setting to avoid the
normal handling of IP packets, and instead uses a socket-like
UART interface to handle incoming and outgoing data via AT commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit adds a node for the ASMedia 2364 controller that acts as an
I2C master on the I2C0 bus. This node contains the GPIO used by the MCU
to notify the ASM2364 that data are available to read.
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
This patch adds a DTS binding for the Texas Instruments LP5030 and
LP5036 I2C LED controllers. They are respectively providing up to 30
and 36 channels (i.e. 10 or 12 RGB LEDs).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
The led-controller DT binding gathers some common properties for LED
controllers and for the LED child nodes.
One notable property is "color-mapping" which allows to define a channel
to color mapping for multicolor LEDs.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Signed-off-by: Maxime Bittan <maxime.bittan@seagate.com>
By default the I2C timing (I2C_TIMINGR register) of I2C V2 peripheral is
computed depending on clocks at runtime with relatively low precision.
This optional property allows to provide a list of pre-computed values
(typically computed from STM32CubeMX SW tool) instead of using runtime
algorithm.
The precomputed value is only valid for a given clock configuration and
I2C speed setting, so this valid configuration is provided with each
value entry.
Signed-off-by: Laurent Meunier <laurent.meunier@st.com>
The spi_flash_w25qxxdv driver has been superseded by the generic
spi_nor driver for over a year. The only non-refactoring change to
the W25Q driver in the last 18 months was done to support a backport
to 1.14.
All devices supported by spi_flash_w25qxxdv driver are expected to be
supported by the spi_nor driver, using the standard `jedec,spi-nor`
devicetree compatible. No in-tree devicetree files make use of this
driver.
Remove the confusion about which driver to select by removing the
unmaintained redundant driver.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
