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5034 Commits

Author SHA1 Message Date
Derek Snell
11623eb1e4 soc: nxp: rt116x: Fix bus clocking 
Reverts bus clock settings.  Follows MCUXpresso SDK clock settings, and
sets to output of SysPLL2 PFD3 at 198 MHz.

Signed-off-by: Derek Snell <derek.snell@nxp.com>
 2024-09-23 18:07:59 -04:00
Yong Cong Sin
022041edba soc: riscv: andes_v5: fix PMA compilation warnings 
These static functions in the `pma.c` are used only when
`CONFIG_NOCACHE_MEMORY` is enabled, so guard them accordingly.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
 2024-09-21 12:23:39 +01:00
Marek Matej
a1c4552ea9 soc: esp32c6: Add runtime heap symbols 
Update the linker scripts to provide necessary symbols.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Marek Matej
bf2c67c441 soc: esp32c2: ESP WiFi heap 
Provide symbols for the creation of dynamic memory pool.
Update the ROM-code SRAM usage according the IDF main.
Fix static allocations size check.
Increase iram_seg memory size for MCUboot.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Marek Matej
2683774265 soc: esp32c3: ESP WiFi heap 
Provide symbols for the creation of dynamic memory pool.
Fix static allocations size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Marek Matej
13a59fb855 soc: esp32s3: ESP WiFi heap 
Provide symbols for the creation of dynamic memory pool.
Fix static allocations size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Marek Matej
3784beb6cc soc: esp32s2: ESP WiFi heap 
Provide symbols for the creation of dynamic memory pool.
Fix the loader ROM buffers start address.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Marek Matej
94731488e7 soc: esp32: ESP WiFi heap 
Provide symbols for the creation of dynamic memory pool.
Fix static allocation size check.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Marek Matej
15d0189d3e soc: espressif: Introduce runtime heap mempool 
Add the `CONFIG_ESP_RUNTIME_HEAP` kconfig.
This allows the memory pool to be created starting
at `z_mapped_end` ending at `_heap_sentry`.

Added choice symbol ESP_WIFI_HEAP_* to select which
heap to use in the ESP WiFi adapter module.

Add file heap.c with code to initialize the runtime heap.
Size of the pool is checked during the runtime.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-21 11:29:53 +02:00
Daniel Leung
4c5e33b2c2 soc: cdns/dc233c: advertise coredump with privilege stack 
This lets the SoC to select the correct kconfigs to show that
it supports coredump, and with the ability to dump privilege
stack.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
 2024-09-21 11:29:39 +02:00
Anas Nashif
f08c91a7e4 soc: stm32g4x/stm32l0x: fix soc hook calls 
Missed 2 places related to power management.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-21 11:29:06 +02:00
Anas Nashif
3eded9d10d soc: intel_ish: remove duplicate hook 
Remove duplicate hook and fold power code into the same early soc hook.

Fixes #78776

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-21 11:29:06 +02:00
Tom Chang
0ded5623f2 soc: npcx: update register definition for espi vw 
This CL adds the field for the index of virtual wire and the enable bit.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
 2024-09-20 15:14:57 -05:00
Declan Snyder
4405420b33 soc: mcxw71: Enable FMU flash controller 
Enable flash controller driver for main FMU on MCXW71

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
 2024-09-20 15:14:11 -05:00
Declan Snyder
cbee39ef71 soc: nxp: Add MCXW71 
Add MCXW71 SOC, which inherits some qualitiies
of kinetis heritage platforms.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
 2024-09-20 15:14:11 -05:00
Brandon Allen
3176ec55bb soc: esp32s3: bump esp32s3 bootloader iram and dram sizes. 
Currently the RAM allocated for the bootloader is not
enough to use MCUBoot with crypto signatures.
This commit bumps the #defines accordingly to fix
compile errors with ecdsa_p256 and RSA.

Signed-off-by: Brandon Allen <brandon.allen@exacttechnology.com>
 2024-09-20 11:53:11 -05:00
Anas Nashif
b73c5578e3 soc: ti: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
6624ebd156 soc: telink: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
c6a03606c2 soc: st: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
49f7204530 soc: snps: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
a018f9d5ec soc: silabs: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
2c1fde39c4 soc: sifive: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
258c4db1e2 soc: renesas: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
f585e852ed soc: quicklogic: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
911d5532bb soc: openisa: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
f519f00f16 soc: nxp: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
21217309bf soc: nuvoton: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
1d7910352d soc: microchip: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
8a16c72023 soc: lowrisc: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
c344771d8b soc: intel: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
e6506619ca soc: gd: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
c9e0a4b843 soc: ene: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
5c541ffd30 soc: brcm: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
51c771ecb2 soc: atmel: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
3af24f88ce soc: arm: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
da118b9f24 soc: andestech: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
72ee7aa279 soc: ambiq: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Anas Nashif
b60efecdf6 soc: adi: move init code from SYS_INIT to hooks 
Replace SYS_INIT with SoC hooks and adapt SoC init code

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-20 13:15:31 +02:00
Sven Ginka
0a59ed609c soc: sensry: Fix isa extension settings 
Before that fix, the march was set via direct
CMakeLists.txt. Now its done in Kconfig.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
 2024-09-20 13:14:16 +02:00
Gerard Marull-Paretas
718007a038 soc: nordic: nrf53: deprecate all L|HFXO options 
Devicetree should be used instead. Example DT snippets are provided to
ease with the transition.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
 2024-09-20 11:08:39 +02:00
Gerard Marull-Paretas
f00bd302f4 soc: nordic: nrf53: allow configuring L|HFXO from DT 
Support both, Kconfig (about to be deprecated) and DT.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
 2024-09-20 11:08:39 +02:00
Jiafei Pan
bd03883744 soc: imx8m: change RDC configuration based on device tree 
Can disable RDC configuration if RDC node is disabled.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
 2024-09-19 18:02:50 -04:00
Marek Matej
a0d7016e27 soc: espressif: Simple boot validity 
Update CONFIG_ESP_SIMPLE_BOOT to exclude if CONFIG_MCUBOOT=y
Fix usage of the config according to actual definition.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
 2024-09-19 18:02:20 -04:00
Michal Smola
add15a62a6 soc: nxp mcxc: Add tpm clock selection 
Timer/PWM Module (TPM) initial clock source is not selected.
Add initial clock source selection based on Devicetree configuration.
Rename clock sources definitions from LPUART specific to general names
usable by several modules on the SoC.

Signed-off-by: Michal Smola <michal.smola@nxp.com>
 2024-09-19 18:27:11 +01:00
Neil Chen
880952d35a soc: mcxc444: add soc support for mcxc444 
Add MCXC444 support

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
 2024-09-19 18:17:19 +01:00
Flavio Ceolin
086e4f84ed intel_adsp: cavstool: Remove legacy code 
cavs15, cavs18 and cavs20 were removed from Zephyr there is no
need to handle those platforms in the tool.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
 2024-09-19 03:26:53 -04:00
Maxime Vincent
f86f98fa2e soc: arm: nxp: fix USB w/ SPEED_OPTIMIZATIONS 
Fix USB w/ SPEED_OPTIMIZATIONS for LPC55xxx SoCs
Root cause was non-volatile register access,
which could get optimized by the compiler
(by -fschedule-insns, specifically)

Signed-off-by: Maxime Vincent <maxime@veemax.be>
 2024-09-17 14:52:27 -04:00
Vit Stanicek
adb83d26bf soc: mimxrt685s/cm33: Fix lockup on clock config 
Imply CONFIG_INIT_AUDIO_PLL on nxp,dmic driver selection on
mimxrt685s/cm33. Make DMIC clock config dependent on the use of the
RT685's audio PLL.

Fixes a regression described in #77851.

Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
 2024-09-17 17:44:48 +01:00
Chekhov Ma
643db3fa0b soc: imx93: enable flexcan driver 
- Add flexcan dts node and pinctrl.

Signed-off-by: Chekhov Ma <chekhov.ma@nxp.com>
 2024-09-17 17:44:14 +01:00
Anas Nashif
f438696281 soc: mcxa156: use soc hooks 
Use SoC hooks instead of legacy z_arm_platform_init.

Fixes #78386

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
 2024-09-16 15:12:18 -04:00