Run 16-bit frames tests also when DMA is enabled. In addition,
remove the extra code required for the mentioned tests in
favor of config. files, and add test cases for nocache regions
defined in devicetree.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Initial version of Infineon CAT1 SPI Driver supporting synchronous
and asynchronous data transfer API
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Enable these tests only for H7 and if DMA is not enabled, as
running them with DMA would require modifying the dmamux
configuration in devicetree to move half-words instead of
bytes.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
CONFIG_NOCACHE_MEMORY is a valid way of declaring buffers in
nocache regions. Consider them valid in the stm32 SPI driver
nocache check. Also, don't check NULL buffers as the SPI
interface states that such buffers will result in sending
zeroes.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
Add `yd_esp32` board:
- Model name: YD-ESP32
- Manufacturer: VCC-GND® Studio
- Espressif module: ESP32-WROOM-32E
Signed-off-by: Julio Cesar <hi@jcsx.dev>
This is following the same convention that was recently introduced to Alder
Lake boards (intel_adl). Additionally, an "S" suffix is added to the
boards, since what's currently supported is in fact the Raptor Lake S
variant.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Configure LPSPI instances on this board. All of them are routed with SDI
and SDO data pins inverted.
Enable SPI tests without DMA support for the moment.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Remove virtual esp32 board and replace it with the
real word boards:
- esp32_devkitc_wroom
- esp32_devkitc_wrover (with PSRAM option)
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Add support for SPI on RT1040 EVK, tested using
tests/drivers/spi/spi_loopback sample. Transfers are enabled using DMA
mode, with LPSPI1.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rather than the rings, which weren't shared between userspace and kernel
space in Zephyr like they are in Linux with io_uring, use atomic mpsc
queues for submission and completion queues.
Most importantly this removes a potential head of line blocker in the
submission queue as the sqe would be held until a task is completed.
As additional bonuses this avoids some additional locks and restrictions
about what can be submitted and where. It also removes the need for
two executors as all chains/transactions are done concurrently.
Lastly this opens up the possibility for a common pool of sqe's to
allocate from potentially saving lots of memory.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add spi_cs_is_gpio(_dt) helpers to check whether SPI CS is controlled by
GPIO or not. This both improves code readability and isolates SPI
internals.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As of today it is not possible to use SPI dt-spec macros in C++,
something known and documented. The main reason is because `cs` property
is initialized using a compound literal, something not supported in C++.
This PR takes another approach, that is to not make `cs` a pointer but a
struct member. This way, we can perform a regular initialization, at the
cost of using extra memory for unused delay/pin/flags if `cs` is not
used.
Fixes#56572
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests/drivers/spi/spi_loopback/drivers.spi.loopback on
adafruit_itsybitsy_m4_express fails to build. Fix it by adding
CONFIG_SPI_ASYNC=n.
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
tests/drivers/spi/spi_loopback/drivers.spi.loopback on atsame54_xpro
fails to build. Fix it by adding a CS pin and DMA channels to the board
overlay. Passes on hardware with spi_loopback fixture after change.
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add interrupt and DMA tests for rpi_pico boards.
Add tests for combination of cases of DMA, interrupt and
DMA is not enabled by dts.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Configure the tests/drivers/spi/spi_loopback to run on the
stm32h573i_dk disco kit with DMA transfer
use gpdma1 or gpdma2.
GPDMA1 or GPDMA2 have the same request for spi2 transfer.
Connect D11 and D12 of the ARDuino CN13 connector to PASS the test.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the configuration for running the spi_loopback (interrupt mode)
on the stm32h573i_dk disco kit.
The SPI2 is enabled by the board DTS
Connect pin D11 and D12 on the Arduino connector (CN13)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds the equivalent spi loopback tests using RTIO and a testplan that
uses it. Adds a tdk robokit1 overlay to enable the NOCACHE option so
that DMA transfers correctly work.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Configure through an overlay file, the rpl_crb board
for running the tests/drivers/spi/spi_loopback.
Signed-off-by: Ramesh Babu B <ramesh.babu.b@intel.com>
lib -> libraries to be consistent with everything else.
And fix identifier for a few stray tests that were wrongly
labeled/tagged.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use the macro as defined by the
include/zephyr/dt-bindings/dma/stm32_dma.h to configure the
dma channel.
Use the STM32_DMA_PERIPH_TX or STM32_DMA_PERIPH_RX value.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add interrupt and DMA tests for GD32 boards.
Use overlay-gd32-spi-interrupt.conf when testing interrupt based transfer,
use overlay-gd32-spi-dma.conf when testing DMA transfer,
Add overlay file for GD32 boards for these tests.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Fix all line-length errors detected by yamllint:
yamllint -f parsable -c .yamllint $( find -regex '.*\.y[a]*ml' ) | \
grep '(line-length)'
Using a limit is set to 100 columns, not touching the commandlines in
GitHub workflows (at least for now).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Configure through an overlay file, the stm32f3_disco board
for running the tests/drivers/spi/spi_loopback.
The SPI1 is selected: MOSI/MISO output pins are available
on the board.
Connect pin PA6 & PA7 of connector P1 to PASS the test.
Add the spi_loopback fixture.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Configure through an overlay file, the nucleo_l152re board
for running the tests/drivers/spi/spi_loopback with DMA.
Limit the spi speed freq to run the test correctly.
The SPI1 is selected: MOSI/MISO output pins are available on the platform.
DMA1 channel 2 & 3 are selected for SPI1.
Connect pin D11 & D12 of CN5 to PASS the test.
Add the spi_loopback fixture.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
integration_platforms help us control what get built/executed in CI and
for each PR submitted. They do not filter out platforms, instead they
just minimize the amount of builds/testing for a particular
tests/sample.
Tests still run on all supported platforms when not in integration mode.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Update overlay files to support the test for 2 boards:
s32z270dc2_rtu0_r52 and s32z270dc2_rtu1_r52
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
