Commit Graph

156 Commits

Author SHA1 Message Date
Jatty Andriean
3eea17c5de tests: drivers: clock_control: Add PLL fracn test
Added a test case that generates a 160 MHz system clock
using a 16777216 Hz HSE clock and also using a 16 MHz HSI

Signed-off-by: Jatty Andriean <jandriea@outlook.com>
2023-09-26 15:06:56 +02:00
Krzysztof Chruściński
3168623abb tests: drivers: clock_control: nrf_lf_clock_start: Clean up
After 31767a0bc there is no need to disable boot banner because
initial clock state is read in POST_KERNEL stage before the boot
banner is printed.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2023-09-13 11:36:30 +02:00
Daniel Leung
121b4d2d62 tests: drivers: rename shadow variables
Renames shadow variables found by -Wshadow.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-08-10 08:14:12 +00:00
Erwan Gouriou
30061ecd7f tests/drivers/clock_control: Add tests for stm32wba_core
Add tests to validate implementation of stm32wba clock_control driver.

Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
2023-07-20 16:25:02 +02:00
Moritz Fischer
28ed7f057d drivers: clock_control: Add clock_fixed_rate driver
Add fixed-clock clock control driver. This is a first step towards
making fixed-clocks a first-class citizen in the clock control
framework.

Since the change is hidden behind a Kconfig enable this is opt-in
for now.

Signed-off-by: Moritz Fischer <moritzf@google.com>
2023-07-03 12:49:27 +02:00
Adrian Warecki
1a4bc7580b adsp: Rename cpu clock related functions
The word cpu was added to the names of functions, structs, types
and definitions to disambiguate the names and make room in the namespace
for soc clock control functions.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-06-20 14:19:13 -04:00
Francois Ramu
a0725f039c tests: drivers: clock_control of the stm32h5 core
Adapt the clock scheme for testing the clock on the stm32h573i_dk.
By default the HSI is 32MHz (div-by-2).
Only scheme for pll sourced by HSI is useful at max freq of 240MHz.
Configure the usart1-console clock to be csi  to always get
a valid clock source in any usecase.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-05-15 13:09:46 +02:00
Gerard Marull-Paretas
93b63df762 samples, tests: convert string-based twister lists to YAML lists
Twister now supports using YAML lists for all fields that were written
as space-separated lists. Used twister_to_list.py script. Some artifacts
on string length are due to how ruamel dumps content.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-10 09:52:37 +02:00
Adam Wojasinski
beb7313fc4 drivers: clock_control_nrf: Align LF clock sources symbols to new nrfx
New nrfx release brings change of Low frequency sources symbols
in nrf_clock hal to uppercase. This commit aligns all occurrences.

Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
2023-05-05 11:47:53 +02:00
Gerard Marull-Paretas
1eb683a514 device: remove redundant init functions
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-19 10:00:25 +02:00
Thomas Stranger
8178807b31 tests: drivers: clock_control: stm32 common: also test get_status
Add clock_control_get_status checks to the stm32_common_devices adc
and i2c tests, to verify that checking the status of gating clocks and
domain clock sources works.

Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
2023-04-17 11:33:15 +02:00
Gerard Marull-Paretas
a5fd0d184a init: remove the need for a dummy device pointer in SYS_INIT functions
The init infrastructure, found in `init.h`, is currently used by:

- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices

They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:

```c
struct init_entry {
	int (*init)(const struct device *dev);
	/* only set by DEVICE_*, otherwise NULL */
	const struct device *dev;
}
```

As a result, we end up with such weird/ugly pattern:

```c
static int my_init(const struct device *dev)
{
	/* always NULL! add ARG_UNUSED to avoid compiler warning */
	ARG_UNUSED(dev);
	...
}
```

This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:

```c
static int my_init(void)
{
	...
}
```

This is achieved using a union:

```c
union init_function {
	/* for SYS_INIT, used when init_entry.dev == NULL */
	int (*sys)(void);
	/* for DEVICE*, used when init_entry.dev != NULL */
	int (*dev)(const struct device *dev);
};

struct init_entry {
	/* stores init function (either for SYS_INIT or DEVICE*)
	union init_function init_fn;
	/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
	 * to know which union entry to call.
	 */
	const struct device *dev;
}
```

This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.

**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

init: convert SYS_INIT functions to the new signature

Conversion scripted using scripts/utils/migrate_sys_init.py.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

manifest: update projects for SYS_INIT changes

Update modules with updated SYS_INIT calls:

- hal_ti
- lvgl
- sof
- TraceRecorderSource

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: devicetree: devices: adjust test

Adjust test according to the recently introduced SYS_INIT
infrastructure.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>

tests: kernel: threads: adjust SYS_INIT call

Adjust to the new signature: int (*init_fn)(void);

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-04-12 14:28:07 +00:00
Anas Nashif
fcefc27823 tests: remove intel adsp cavs platforms from filters
Remove all filters related to dropped platforms.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-06 18:51:56 +02:00
Guillaume Gautier
3a0b00272b tests: drivers: clock_control: stm32_devices: split test
Split STM32 device clock configuration file so that each driver has its
own tests in its own file

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-30 13:47:55 +02:00
Guillaume Gautier
6f525f33a4 tests: drivers: clock_control: stm32_common_devices: add i2s test
Add a test for testing STM32 I2S domain clock on STM32F401 board.
Add an ifdef on I2C test as F4 does not have a domain clock for I2C.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-30 13:47:55 +02:00
Armin Brauns
1de52f501c tests: drivers: clock_control: stm32: clock selection with dirty registers
This makes sure clock selection works even if the registers aren't in their
default (reset) state.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2023-03-29 15:53:08 +00:00
Francois Ramu
c3e9879d95 tests: drivers: clock control for the stm32H5 serie core
Adds the configurations for testing the clock controller driver
of the stm32H5 serie coreon stm32h573i disco kit

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-29 10:04:39 +02:00
Erwan Gouriou
888607d550 tests: clock_control: stm32h7: pll2: Fix test configuration
In test spi1_pll2p_1, pll2 should be enabled instead of pll3.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2023-01-04 16:51:57 +01:00
Fabio Baltieri
f5b4acac57 yamllint: indentation: fix files in tests/
Fix the YAML files indentation for files in tests/.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-04 14:23:53 +01:00
Fabio Baltieri
7db1d17ee3 yamllint: fix all yamllint line-length errors
Fix all line-length errors detected by yamllint:

yamllint -f parsable -c .yamllint $( find -regex '.*\.y[a]*ml' ) | \
  grep '(line-length)'

Using a limit is set to 100 columns, not touching the commandlines in
GitHub workflows (at least for now).

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-04 01:16:45 +09:00
Francois Ramu
5b2d80ca18 tests: drivers: stm32g0 clock control with APB1_2 RCC register
Change the name of the STM32_CLOCK_BUS_APB2 RCC resgister
of the stm32g0 to STM32_CLOCK_BUS_APB1_2
in the testcase for the stm32g0 device.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-12-13 10:21:18 -06:00
Anas Nashif
ba7d730e9b tests/samples: use integration_plaforms in more tests/samples
integration_platforms help us control what get built/executed in CI and
for each PR submitted. They do not filter out platforms, instead they
just minimize the amount of builds/testing for a particular
tests/sample.
Tests still run on all supported platforms when not in integration mode.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-11-29 16:03:23 +01:00
Georgij Cernysiov
7f06af6b82 tests: drivers: clock_control: stm32: test H7 PLL2_P SPI1
Tests PLL2_P clock source for the SPI1 (SPI123SEL).

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-11-29 11:54:52 +01:00
Andrzej Głąbek
d361d8f7ec tests: drivers: nrf_lf_clock_control: Polish status messages a bit
Improve alignment in the source code and limit printed messages
(SYSTEM_CLOCK_NO_WAIT and SYSTEM_CLOCK_WAIT_FOR_* are choice options,
so it is enough to print only the enabled one).

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-29 09:49:45 +01:00
Andrzej Głąbek
31767a0bce tests: drivers: nrf_lf_clock_control: Fix test initialization
This test needs an initialization step to be done soon after the system
clock is started. ZTEST setup function is too late for that, so use an
initialization function executed at the POST_KERNEL stage instead.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-29 09:49:45 +01:00
Arsen Eloglian
7c8264277a tests: adsp_clock: update tests
rename cavs_* to adsp_*

Signed-off-by: Arsen Eloglian <ArsenX.Eloglian@intel.com>
2022-11-28 17:45:20 -05:00
Georgij Cernysiov
376399ecb8 tests: drivers: clock_control: stm32: fix H7 zassert output
Fixes mixed up expected and actual values in zassert
output.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-11-28 12:11:18 +01:00
Andrzej Głąbek
a4f063ec49 tests: clock_control: nrf_onoff_and_bt: Add clearing of test_end
This flag needs to be cleared at the beginning of each test. Otherwise,
when the flag remains set after the previous test, the timer handler is
not rescheduled so executing of the current test is actually pointless.

This was in fact the case with `test_bt_interrupted` before switching
the test suite to the new ZTEST API. When this test was executed as
the second one, the timer handler was called only once and the test
could pass (giving false confirmation that the related routines of
the clock_control_nrf driver work properly). After the API switching,
the order of test execution was changed and that test started failing.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-25 10:45:50 +01:00
Andrzej Głąbek
54e9594499 tests: clock_control: nrf_onoff_and_bt: Refactor code a bit
- most of initialization can be done once per the test suite
  (clearing of the iteration counter can be moved to particular
  tests where it fits better), so instead of the ZTEST before
  function use the setup one for doing the initialization
- make `clock_dev` and `cli` common variables for all tests
- use K_USEC() instead of Z_TIMEOUT_US(), as the latter is an
  internal Zephyr macro
- instead of `K_USEC(long_timeout ? 300 : 100)` use `K_USEC(300)`
  and `K_USEC(100)` so that their values can be calculated at the
  build time
- modify construction of main loops in tests so that it is more
  exposed when the `test_end` flag is set

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-25 10:45:50 +01:00
Andrzej Głąbek
fd3f22b24c tests: clock_control: nrf_onoff_and_bt: Remove needless GPIO toggling
Remove GPIO toggling, that seems to be remains from some debugging,
as it can potentially interfere with some hardware on specific boards.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-11-25 10:45:50 +01:00
Anas Nashif
67e8d03280 tests/samples: fix some missing tags
Many driver samples or tests only had 'drivers' as the tag, without a
tag indicating what driver that is exactly, so add some missing tags.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-11-14 07:08:04 -05:00
Erwan Gouriou
9b7d3657c9 tests: clock_control: stm32h7_devices: Test perck domain config
Add a test dedicated to verify the perck domain clock configuration.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Erwan Gouriou
cf84395f7b tests: clock_control: stm32h7_devices: Test perck configuration
When it needs to access perck clock speed, clock_control driver is using
LL API to read RCC registers and compute frequency.
We're using the exact same method to test the frequency and as a result
we were not able to detect that there was an issue when configuring this
clock.

Add a specific case to this test in order to verify perck domain clock if
perck is used in SPI clk configuration.

We're now able to detect issues (and test is failing).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Erwan Gouriou
efd6fdb381 tests: clock_control: stm32: Enhance tests log messages
Perform some rework in messages displayed in case of failure to ease
readability:
- remove redundant information
- add missing information
- convert registers values to hex

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Erwan Gouriou
447c3df873 tests: clock_control: stm32h7_devices: Fix clock source check
Test was using "clock-names" property to query domain clock configuration.
This is not working since clock-names was removed in the last step of the
feature implementation and whole macro was always reporting DT_NO_CLOCK.

This issue went undetected because of an additional issue in the exception
case which was testing "zassert_true(1, .." instead of "zassert_true(0, .".

Fix both issues to make the test efficient again.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-11-10 09:30:09 +01:00
Kumar Gala
a1195ae39b smp: Move for loops to use arch_num_cpus instead of CONFIG_MP_NUM_CPUS
Change for loops of the form:

for (i = 0; i < CONFIG_MP_NUM_CPUS; i++)
   ...

to

unsigned int num_cpus = arch_num_cpus();
for (i = 0; i < num_cpus; i++)
   ...

We do the call outside of the for loop so that it only happens once,
rather than on every iteration.

Signed-off-by: Kumar Gala <kumar.gala@intel.com>
2022-10-21 13:14:58 +02:00
Gerard Marull-Paretas
6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Lauren Murphy
85445474f2 boards, dts: fix filenames and dts refs for adsp clock
Changes filenames and DTS references from CAVS clock to
ADSP clock.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-09-14 07:23:08 -04:00
Michał Barnaś
dae8efa692 ztest: remove the obsolete NULL appended to zassert macros
This commit removes the usage of NULL parameter as message in
zassert_* macros after making it optional

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-09-09 07:05:38 -04:00
Meng xianglin
9882ae8ace tests: stm32u5_devices: move to new ztest API
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32u5_devices
are move to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
f8f667e91c tests: stm32u5_core: move to new ztest API
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32u5_core
are moved to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
0ef8aae92b tests: stm32h7_devices: move to new ztest API
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices
are moved to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
45c5c7ba91 tests: stm32h7_core: move to new ztest API
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32h7_core
are moved to new zest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
4e2da2e58f tests: stm32_common_devices: move to new ztest API
test cases in
tests/drivers/clock_control/stm32_clock_configuration/stm32_common_devices
are moved to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
bfd5118f53 tests: stm32_common_core: move to new ztest API
test cases in
tests/dirvers/clock_control/stm32_clock_configuration/stm32_common_core
are moved to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
13d281b683 tests: onoff: move to new ztest API
test cases in tests/drivers/clock_control/onoff are moved to new
ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
22d62cf28d tests: nrf_onof_and_bt: move to new ztest API
test cases in tests/drivers/clock_control/nrf_onoff_and_bt are moved
to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
13d22e0937 tests: nrf_lf_clock_start: move to new ztest API
test cases in tests/drivers/clock_control/nrf_lf_clock_start are
move to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
dae9bb4705 tests: nrf_clock_calibration: move to new ztest API
test cases in tests/drivers/clock_control/nrf_clck_calibration
are moved to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00
Meng xianglin
d22f52a306 tests: clock_control_api: move to new ztest API
test cases in tests/drivers/clock_control/clock_control_api are
moved to new ztest API

Signed-off-by: Meng xianglin <xianglinx.meng@intel.com>
2022-09-05 10:13:27 +00:00