Commit Graph

814 Commits

Author SHA1 Message Date
Neil Armstrong
f8f2936dba pcie: add initial controller support
This adds :
- Generic PCIe Controller layer implementing the current PCIe API
- Generic PCIe Controller in ECAM mode driver

The Generic PCIe Controller layer provides:
- Configuration space read/write
- single bus endpoint enumerations
- Endpoint I/O, MEM & MEM64 BARs allocation
- Endpoint I/O, MEM & MEM64 BARs get & translation for drivers

The Generic PCIe Controller in ECAM mode driver provides:
- Raw DT RANGES properties into usable PCIe regions
- Configuration space read/write into ECAM config space
- PCIe regions allocation & translation

The limitations are:
- No support for PCIe prefetchable regions
- No support for PCIe bus configuration (only bus0 is supported)
- No support for multiple controllers (no domain-id in BDF)

Support has been designed to initially support Root Complexes with
Root Complex Integrated Endpoint, which was designed for Embedded
Systems with internal-only PCIe Endpoints on bus 0.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-11-25 18:37:15 +01:00
Neil Armstrong
c714368691 pcie: add PCIe Controller API
This adds a generic PCIe Controller driver API providing the
necessary callbacks & config structure to handle the PCIe
config space and BAR regions handling.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-11-25 18:37:15 +01:00
Wealian Liao
5a9bc389f0 driver: gpio: nct38xx: Add NCT38XX gpio driver support
NCT38XX series, which are i2c-based chips, support a different number
of GPIO functionality. For NCT3807, it has 2 GPIO ports on the same i2c
device address. For NCT3808, it has 2 GPIO ports on different i2c
device addresses. This commit adds NCT38XX GPIO driver support &
provides the interrupt handler for the share alert pin.

The following is NCT3807 devicetree node example:
```
&i2c0_0 {
	nct3807_0: nct3807@70 {
		#address-cells = <1>;
		#size-cells = <0>;
		compatible = "nuvoton,nct38xx-gpio";
		reg = <0x70>;
		label = "NCT3807_0";

		gpio@0 {
			compatible = "nuvoton,nct38xx-gpio-port";
			reg = <0x0>;
			label = "NCT3807_0_GPIO0";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			pin_mask = <0xff>;
			pinmux_mask = <0xf7>;
		};

		gpio@1 {
			compatible = "nuvoton,nct38xx-gpio-port";
			reg = <0x1>;
			label = "NCT3807_0_GPIO1";
			gpio-controller;
			#gpio-cells = <2>;
			ngpios = <8>;
			pin_mask = <0xff>;
		};
	};
};
```

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2021-11-20 08:00:38 -05:00
Tomasz Bursztyka
2cf6c8061e spi: Fixing documentation for groups of macros
Group macros documentation properly.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Tomasz Bursztyka
4bd5935302 dts/bindings: Add a dedicated property for duplex mode on SPI device
Users will have to include dt-bindings/spi/spi.h in order to use the
relevant flags fol this property. For instance:

    ...
    duplex = <SPI_HALF_DUPLEX>;
    ....

By default all SPI device are configured to be full duplex so the
property is optional. This property makes sense only for devices that
can be configured on either modes. Which, in such case, it will need to
use DT_INST_PROP(<instance number>, duplex) macro call to retrieve the
property value. Others can fully ignore it.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Tomasz Bursztyka
f8cc93de8c spi: Add a configuration option for half/full duplex mode
This is meant to expose half/full duplex configuration option on regular
configuration. So far, dual/quad/octal are not exactly supported, as it
would require extensions to the SPI buffer for a full support.

So moving these modes to an extended operation attribute
(32 vs 16 bits), disabled by default.

And exposing half/full duplex configuration bit. Full duplex being the
default option.

Fixes #19134

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Tomasz Bursztyka
4316b3a10e spi: Precise suffix to all unsigned numbers
The rule was not applied on spi header.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-19 11:50:38 +01:00
Tomasz Bursztyka
60827c2dd6 include/spi: Clarify spi_release() function behavior
It will unlock and unhold the CS line. Note that the lock and the CS
being hold on are 2 separate config bits, so if only one is selected
spi_release() will only apply on this configuration.

Note: this has been already the case in the controller drivers, where
there implementation of spi_release() calls
spi_context_unlock_unconditionally(). And that function always forces
the CS line to an inactive state.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-18 19:13:49 -05:00
Henrik Brix Andersen
2e8cc9f9b0 drivers: gpio: add combined drive strength flags and mask
Introduce combined GPIO drive strength flags for GPIO controllers only
supporting either default or alternative drive strength regardless if
the pin is driven to a high or a low level.

Fixes: #30329

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2021-11-11 07:20:12 -05:00
Daniel Leung
40c2b1e99c uart: add API support for wide data
This adds API to support datum more than 8-bit wide. Drivers are
still responsible for the implementation.

Fixes #31914

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-11-09 19:44:38 -05:00
Ryan Erickson
270608139f modem: hl7800: remove NEWLIB_LIBC dependency
Zephyr LIBC minimal has definitions for struct tm.

Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
2021-11-09 11:19:02 +01:00
Andrei-Edward Popa
5413661a81 boards: xtensa: add ledc support to the esp32 board
add ledc to board dtsi file,
change compatible and device define in pwm driver,
add yaml for board ledc support,
fix missing include for board in gpio include

Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
2021-11-07 05:36:42 -05:00
Tomasz Bursztyka
379c1dea38 include/pcie: Add PTM API
This is a really simple one: one function is exposed to enable PTM
requester on a endpoint. PTM root capability will be enabled
automatically via a dedicated driver and its related DTS exposure.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-04 11:06:02 -04:00
Tomasz Bursztyka
3c02c1678e include/pcie: Rename capability prefix
s/PCI_/PCIE_ on PCI Express capabilities.
Legacy PCI ones keep the PCI_ prefix.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2021-11-04 11:06:02 -04:00
Erwan Gouriou
e19716e5c9 include/driver/clock_control: stm32: Remove STM32_PLL_PREDIV1
Make the code coherent with the comment:
purely remove STM32_PLL_PREDIV1.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-03 16:19:06 -04:00
Erwan Gouriou
dede798ce5 include/drivers/clock_control: stm32: Simplify macro definitions
When possible, replace DT_INST(0, st_stm32xx_rcc) by equivalent
DT_NODELABEL(rcc).
Also, replace DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(pll),
st_stm32f1_pll_clock, okay) by equivalent
DT_NODE_HAS_STATUS(DT_NODELABEL(pll), okay).

Last, don't check about rcc node label status, which is not an
optional node.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-03 16:19:06 -04:00
Erwan Gouriou
ace71a98a4 drivers/clock_control: stm32: Remove CLOCK_STM32_ Kconfig symbols
Remove deprecated Kconfig based STM32 clock configuration system.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-11-03 16:19:06 -04:00
Dawid Niedzwiecki
65277d4770 i2c: emul: Add get_config function
Add get_config function to I2C emulator.

Also update tests using I2C emulator to use i2c_get_config.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2021-11-02 16:46:33 +01:00
Dawid Niedzwiecki
72486b6971 i2c: Add get_config to I2C API
Some applications need to get the current I2C configuration. Add a
proper callback to I2C API under Kconfig option not to change
applications that don't need this feature.

Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
2021-11-02 16:46:33 +01:00
Martin Jäger
5511cba5fe drivers: can: Add get_max_filters API
The maximum number of concurrent filters depends on the hardware and
the driver implementation. This API allows the application to obtain
the maximum number of available filters.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-10-28 13:56:58 -04:00
Martin Jäger
053ee94d49 drivers: can: Improve rendering of API comments
- Hide internal driver API from public documentation
- Use consistent upper-case naming for CAN, RTR, etc.
- Fix indentation of some comments so that they are
  rendered with monospace font.

Signed-off-by: Martin Jäger <martin@libre.solar>
2021-10-27 15:11:48 -04:00
Radoslaw Koppel
d1a93c1426 drivers: sensor: Const sensor trigger data in trigger handler
This commit adds const modifier in second argument for
sensor trigger handler.
There is no reason to modify this data and this change
would allow to store trigger configuration also in FLASH.

Fixes: #38929

Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
2021-10-27 15:09:35 -04:00
Carlo Caione
1976f33e87 drivers: mbox: Introduce MBOX driver class
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.

If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.

This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2021-10-27 18:27:21 +02:00
Jordan Yates
526b3e9605 lora: asynchronous packet reception
Adds functionality to receive LoRa packets asynchronously. Reception
runs continuously until cancelled by another call to `lora_recv_async`.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2021-10-26 15:48:09 +02:00
Jay Vasanth
c214c59548 Microchip: MEC172x: eSPI driver
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2021-10-26 09:27:20 -04:00
Bartosz Bilas
bf68b670f1 drivers: modem: gsm: extend modem info struct about RSSI value
Add RSSI member into gsm_ppp_modem_info structure in order to
get that information using the gsm_ppp_modem_info function.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-10-26 14:47:38 +03:00
Bartosz Bilas
5107691441 drivers: modem: gsm: allow the user to get modem information
Make modem_info structure public in order to allow the user
to get modem information using gsm_ppp_modem_info function.
Move modem info query commands into separate function
that's called only once during gsm configuring because
there is no necessity to re-querying modem since
they should not change.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-10-26 14:47:38 +03:00
Bartosz Bilas
cb30cc5f8c drivers: modem: gsm: move header file into modem directory
There is a specified location for modem drivers so move this
header right there.

Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
2021-10-26 14:47:38 +03:00
Gerard Marull-Paretas
329f2453c5 drivers: pinctrl: add support for dynamic pin control
Add support for dynamic pin control, that is, allow to change device pin
configuration at runtime. Because no device de-initialization is
available yet, this API has limited usage options, e.g. modify pin
configuration at early boot stage (before device driver is initialized)

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Gerard Marull-Paretas
aecb0c74b5 drivers: pinctrl: allow to skip states
If a certain state has to be skipped, a macro named
Z_PINCTRL_SKIP_<STATE> can be defined evaluating to 1. This can be
useful, for example, to automatically ignore the sleep state if no
device power management is enabled.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Gerard Marull-Paretas
4040df096f drivers: pinctrl: initial skeleton
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Sylvio Alves
b0717d518e drivers: gpio: esp32: use dts and improve code checks
This PR updates GPIO driver to use DTS information
regarding gpio availability.

This also fixes interrupt handling and
also removes kconfig definition for GPIO port.

A few configuration checks were also added to
improve code usage.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2021-10-21 10:53:34 -04:00
Siew Chin Lim
0c34373720 drivers: clock_control: Add clock driver for Intel SoC FPGA Agilex
Add clock driver for Intel SoC FPGA Agilex.

Signed-off-by: Siew Chin Lim <elly.siew.chin.lim@intel.com>
2021-10-12 08:37:03 -04:00
Krzysztof Chruscinski
c590b3545a drivers: serial: Use microseconds to represent timeout
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
However, there are cases when milliseconds granularity is not
enough and can significantly reduce a throughput, e.g. 1ms is
100 bytes at 1Mb.

Updated 4 drivers which implement asynchronous API. Updated
places where API was used.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-10-12 12:26:56 +02:00
Yuriy Vynnychek
8e5eb1732d drivers: uart: irq_tx_ready info update with TX IRQ dependencies
irq_tx_ready API should return 1 only in case if TX IRQ is enabled.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-10-11 21:02:21 -04:00
Jordan Yates
29773391c7 spi: convert CS usage to gpio_dt_spec
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-05 19:24:18 -04:00
Jordan Yates
89d76e9bbe spi: use gpio_dt_spec in struct spi_cs_control
Use the standard `struct gpio_dt_spec` type in the chip select control.
The anonymous struct and union allows previous instantiations to
continue working while letting functions operate on the new type.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-05 19:24:18 -04:00
Yuval Peress
2629fc566d emul: Add data and parent pointers to emulators
Emulators are difficult to work with, they generally require maintaining
some state in a mutable data struct. Since the emulator struct doesn't
support a data field like devices do, the pattern seems to be to add it
to the configuration. This makes following the logic of where things are
difficult.

1. Add a `struct emul *parent` structure to the espi/i2c/spi emulator
   structs to make it easier when casting up.
2. Add a `void *data` field to `struct emul` to hold the data for
   emulators.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-10-05 19:21:39 -04:00
Bartosz Bilas
d6792dd7be drivers: gsm_ppp: introduce modem on/off callbacks
Allow the user to register function callbacks that
are executed during gsm modem configuring and stopping.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2021-10-04 20:46:04 -04:00
Felipe Neves
949a6a8e53 interrupt-controller: intc_esp32c3: make logs optional
Allowing cleaner debug experience and preventing unwanted
outputs during debug.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Felipe Neves
b97c2da2f2 interrupt_controller: intc_esp32c3: added intc driver
For esp32c3 and replaces the hardcoded interrupt
attaching procedures with this new driver.

Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
2021-10-02 14:33:24 -04:00
Pieter De Gendt
00596182fc drivers: hwinfo: add reset causes
Add reset causes for temperature (e.g. overheating), hardware faults
and a user initiated reset.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-09-29 14:44:21 -04:00
Yuval Peress
03bcf8276a emul: Support getting an emulator by name
Issue #38271

Implement a getter for emulators similar to device_get_binding. This
function can be used to get the emulator instance during tests to call
emulator specific functions.

Example: The current BMI160 emulator pre-defines a finite set of data
samples that will be returned. If a test was to be written for logic
that uses that data, then the emulator would become completely useless
without the ability for the test to define what data should be returned.

This will also help in exercising error conditions in tests.

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-09-28 20:12:37 -04:00
Neil Armstrong
e819bd8f34 interrupt_controller: gicv3: add support for LPIs
The LPI (Locality-specific Peripheral Interrupts) are edge-triggered
message-based interrupts that can use an Interrupt Translation
Service (ITS) to route an interrupt to a specific Redistributor and
connected PE.

This implement the necessary LPI support when an ITS is enabled.

The LPI states are stored in memory-backed tables.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-28 19:45:29 -04:00
Neil Armstrong
340a8697d2 interrupt_controller: Add GICv3 ITS API
Add driver API for the Interrupt Translation Service GICv3 module.

The Interrupt Translation Service (ITS) translates an input EventID
from a device, identified by its DeviceID, and determines the
corresponding INTID for this input and target Redistributor + target
PE for that INTID to be delivered as LPI interrupt.

The API permits :
- allocating a new unique LPI interrupt number
- initializing support for a new DeviceID and the required EventIDs
- mapping a DeviceID + EventID to a LPI interrupt number
- triggering an LPI with a DeviceID + EventID

This API will be used by the PCIe MSI/MSI-X logic in another patchset.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2021-09-28 19:45:29 -04:00
Krzysztof Chruscinski
581c20e242 drivers: uart: Cleanup not supported API handling
Fixed discrepancy between documentation and actual returned
error code when API is not enabled or not supported by a
device. Added detection of case when device does not implement
uart_callback_set but ASYNC api is enabled. Returning -ENOSYS in
that case.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-09-27 10:08:28 -04:00
Yuval Peress
a1f6d97978 drivers: syscon: Add support for multiple regions
1. Add support for multiple syscon entries (as a side effect, this also
   fixed syscon.c implementations which weren't being linked to their
   syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon

Signed-off-by: Yuval Peress <peress@chromium.org>
2021-09-22 10:32:11 -04:00
Håkon Øye Amundsen
c0a9de08a2 drivers: clock_control: nrf: fix cpp compatibility
Add missing extern block for CPP compatibility

Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
2021-09-14 09:56:46 +02:00
Jiafei Pan
6f1dc5d3a9 drivers: gicv3: set SPI's affinity when it is enabled
When affinity routing is enabled for Non-secure state
( GICD_CTLR.ARE_NS is '1'), need to set routing information
for the SPI interrupt.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2021-09-07 11:31:22 -04:00
HaiLong Yang
e15bdaa1bd drivers: adc: add PGA gain value
Add PGA gain value for TI ads1299-x chip.

Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
2021-09-03 10:10:09 -04:00