Commit Graph

11 Commits

Author SHA1 Message Date
Dmitrii Golovanov
23324fc5ba boards: qemu_xtensa: coredump: Enable coredump
Enable coredump on qemu_xtensa and qemu_xtensa_mmu.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2023-11-20 10:51:35 -06:00
Dmitrii Golovanov
3a95c78545 tests: coredump: Enable code coverage
Enable code coverage for debug.coredump.logging_backend test.

Signed-off-by: Dmitrii Golovanov <dmitrii.golovanov@intel.com>
2023-11-10 10:40:33 +01:00
Keith Packard
0b90fd5adf samples, tests, boards: Switch main return type from void to int
As both C and C++ standards require applications running under an OS to
return 'int', adapt that for Zephyr to align with those standard. This also
eliminates errors when building with clang when not using -ffreestanding,
and reduces the need for compiler flags to silence warnings for both clang
and gcc.

Most of these changes were automated using coccinelle with the following
script:

@@
@@
- void
+ int
main(...) {
	...
-	return;
+	return 0;
	...
}

Approximately 40 files had to be edited by hand as coccinelle was unable to
fix them.

Signed-off-by: Keith Packard <keithp@keithp.com>
2023-04-14 07:49:41 +09:00
Gerard Marull-Paretas
79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Lauren Murphy
318e6db239 debug: coredump: add xtensa intel adsp, support toolchains
Adds compatibility with Intel ADSP GDB from Zephyr SDK and
from Cadence toolchain to coredump_gdbserver.py.

Adds CAVS 15-25 (APL) register definitions. Implements
handle_register_single_read_packet to serve ADSP GDB
p packets.

Prevents BSA from changing between stack dump printout
and coredump by taking lock. Observed to be necessary for
accurate results on slower simulated platforms.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2022-06-23 15:44:45 -04:00
Gerard Marull-Paretas
ade7ccb918 tests: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all tests to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 20:02:14 +02:00
Mark Holden
7803a4e590 arch: riscv: ARCH_EXCEPT macro
Enable ARCH_EXCEPT macro for non-usermode scenario for RISC-V
Macro will now raise an illegal instruction exception so that mepc will
hold expected value in exception handler, and generated coredump can
reconstruct the failing stack

Coredump tests running on renode (for RISC-V) can now utilize fatal error
path through k_panic

Signed-off-by: Mark Holden <mholden@fb.com>
2022-01-01 07:38:20 -05:00
TOKITA Hiroshi
1421c1728b coredump: add support for Longan Nano boards
Longan Nano boards pass the test that with calling coredump().

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2021-12-20 17:51:30 +01:00
Mark Holden
1a697ccf59 coredump: add support for RISC-V
This adds the necessary bits in arch code, and Python scripts
to enable coredump support for RISC-V

Signed-off-by: Mark Holden <mholden@fb.com>
2021-12-08 08:54:32 -05:00
Ioannis Glaropoulos
633a7208df tests: coredump: use undefined instruction to trigger CPU fault
When building the test for Cortex-M, use an undefined
instruction to trigger a CPU fault, instead of null
pointer de-referencing. That's because null-pointer
access may, in TrustZone-enabled platforms, lead to
a system crash (due to security violation).

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-03-24 05:39:58 -04:00
Daniel Leung
86b2cbc5ea tests: add a test for coredump
This adds a simple test for coredump.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-08-24 20:28:24 -04:00