When playing with PM related applications, stm32cubeprogrammer is
useful to allow flashing even when SoC is in Stop mode.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
This is a follow-up to commit 7a83724e0f.
There is no reason to mark that many GPIO lines as reserved on this
board. And doing so causes several existing tests to fail as they
are configured to use some of those now unavailable GPIO lines.
Limit reservation to the lines that actually cannot be used as
GPIOs without changes in the default configuration of the board
or its physical modification (via solder bridges), i.e.:
- XL1 and XL2 (connections for the 32.768 kHz crystal)
- NFC1 and NFC2 (NFC antenna connections)
- RESET
- TXD and RXD (lines used by the console UART)
- QSPI lines: CS, CLK, and DIO0-3
Provide names for all the GPIO lines that are described on the board.
Even for the reserved ones, so that it is clear why they are reserved.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the WeAct Studio STM32G431 Core Board.
Tested with:
- `samples/basic/blinky`
- `samples/basic/button`
Flashed samples using dfu-util.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
This commit adds missing pinctrl configuration for USARTs in
efm32gg_slwstk6121a, efm32gg_stk3701a and efr32_radio boards
and enables PINCTRL for efr32_radio_brd4180a
and efr32_radio_brd4187c boards.
Signed-off-by: Franciszek Pindel <fpindel@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This commit moves configuration of hfxo from headers defined on board level
to device trees of SoCs.
Signed-off-by: Franciszek Zdobylak <fzdobylak@antmicro.com>
The title for this board README was very broken, messing up not only
this board's README but also the boards TOC.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Enable LinkerServer and PyOCD runners for LPC55Sx6 EVKs,
where it is supported.
It was tested on a real HW.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Add configuration lines to be able to use the jlink debugger with this
board. The disco board leaves the debug lines tri-stated until connecting
to stlink, so it is safe to just plug in the jlink and use it.
Signed-off-by: David Brown <david.brown@linaro.org>
Add Verdin iMX8M Plus board with i.MX8MP SoC and ARM Cortex-M7 processor.
Add two targets (DDR and ITCM) for the iMX8M Plus board.
Port and documentation are based on NXP MIMX8MM EVK board.
This code is intented to be used with the Cortex-M7.
Signed-off-by: Gabriel Freitas <gabriel.freitas@toradex.com>
Currently, the NXP S32 SoCs have three redundant Kconfig hidden
options to define the part number. To streamline this, we will
retain `CONFIG_SOC_PART_NUMBER` to store the part number as a
string and `CONFIG_SOC_PART_NUMBER_<part>` that can be selected
by the boards.
Furthermore, for drivers requiring conditional code compilation
based on the target SoC, they should utilize the series or SoC
config option as applicable, instead of the part number config.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The existing S32K3 Kconfig options employ the `M7` suffix, which is
redundant given that all cores in this series utilize an Arm Cortex-M7
core. Therefore, we should remove it.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add Renesas rzt2m gpio driver with basic functionality.
It supports pin mode configuration and writing/reading to/from gpio ports.
Includes dts changes to build blinky sample.
Signed-off-by: Jakub Michalski <jmichalski@internships.antmicro.com>
This adds a new driver for Renesas RZ/T2M.
The driver allows configuration of pin direction,
pull up/down resistors, drive strength and slew rate,
and selection of function for a pin.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This adds a UART driver for the Renesas RZ/T2M
Serial Communication Interface.
The driver implements:
* Polling API,
* Interrupt-driven API.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
This adds a new SoC: SOC_RENESAS_RZT2M
and a new board: rzt2m_startek_kit
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Co-authored-by: Roman Dobrodii <rdobrodii@antmicro.com>
Added a short paragraph explaining how to use pyOCD to flash and debug this
board, as well as a disclaimer requested by NXP
Signed-off-by: Tim Guite <tim.guite@ttp.com>
Enable the gpio0 node and mux the heartbeat LED. Moreover, add the
heartbeart LED as LED node and create an alias with 'led0'.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
- Make caparray delta a Kconfig variable
- Set caparray delta for beagle_bcf at beagleconnect_freedom_defconfig
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
Signed-off-by: Jason Kridner <jkridner@beagleboard.org>
Support NXP MRT on LPC55XXX SOC series, enable on
lpcxpresso55s69_cpu0, add test overlay to counter basic api test
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add drivers for gpio_i2c_switch which is present in beagleconnect freedom
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
Commit 944ced68f5 enabled
CONFIG_UART_CONSOLE=y for the beagleconnect_freedom board, which had the
side effect of satisfying a required dependency for the sensor shell
sample application and causing new build errors in the weekly full
twister run. Fix the build errors by moving the board's light and
humidity sensor nodes to be children of the I2C controller node.
Signed-off-by: Maureen Helm <maureen.helm@analog.com>
This patch removes the now unused scratch partition and enlarges
the application slots instead.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This commit enables clock control instances for apollo4p_blue_kxr_evb.
Also adds pin configuration for each instance.
Signed-off-by: Aaron Ye <aye@ambiq.com>
Add in DT the possibility to configure both INT1 and INT2
pin. The driver will then assign one of the two (either 1
or 2, according to what value drdy_pin is set) to a gpio
for receiving drdy interrupts.
The other pin may be used in the future to receive event
interrupts.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Commit c6e3bac4f changed the core clock frequency of LPC55XXX series.
That clock is used by the cortex-m systick timer, which is the
default timer used for system time in zephyr on this series.
The bug is that the config SYS_CLOCK_HW_CYCLES_PER_SEC default was not
updated on the affected platforms to account for this change, so system
time is currently recorded as 150% of reality. Fix this by changing the
kconfig to be set automatically at SOC level and remove board defaults.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The sfdp table property is no more required in the DTS of the
stm32h7b3i_dk as it is correctly read from the external
NOR octoflash with the read-sfdp command.
(since PR https://github.com/zephyrproject-rtos/zephyr/pull/62521)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
