Add a linker script for the stm32mp2x soc series. It includes the
standard arm cortex-m linker and adds standard zephyr relocation
sections.
Replace the rom_start section name with .isr_vectors in the linker
script. This is necessary for the zephyr firmware to be started by the
remote proc driver which expects the section containing the vector table
to be named .isr_vectors.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Add initial soc support for the stm32mp2x series, including
initial Kconfig entries and default configuration files.
This enables Zephyr to recognize and build for the stm32mp2x series,
taking the stm32mp257f_ev1 as a baseline.
Includes:
- Kconfig and defconfig files for SoC selection and defaults
- soc.h for hal headers
- CMakeLists.txt for build system integration
- soc.yml update to register the new SoC
System Clock is configured statically from DTS. So no initialization
hook or soc.c needed.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
The STM32 signing tool (STM32_SigningTool_CLI) is invoked as a post-build
command to generate a signed Zephyr binary, which is required to run from
flash on N6 series. If the file specified as output already exists, the
tool will by default prompt to confirm it should be overwritten. However,
when invoked from the build system rather than a terminal, this prompt
will break the build (freeze during the "Linking zephyr.elf" step). This
can be seen by building the same application twice in a row, as the second
build will not be different enough to make the build artifacts be deleted
and thus the (old) signed image will be seen by the tool.
Invoke the tool in silent mode such that user is never prompted. This fixes
build failures while still working as intended (if present, the existing
signed image will get overwritten properly).
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Restore main stack size to the default value since fake entropy
implementation from mbedtls is replaced by STM32 entropy driver.
Signed-off-by: Ali Hozhabri <ali.hozhabri@st.com>
On dual-core STM32H7, the Cortex-M4 core is supposed to wait until the
Cortex-M7 initializes the system before starting to execute. CM7 should
signal this by locking a specific HSEM, which CM4 should poll until locked.
However, the logic on the Cortex-M4 side was reading the "RLR" register of
HSEM, which *locks the semaphore on read* - in turn, this makes the CM4
start directly since it sees that the semaphore is locked (by itself).
Use proper LL API to read HSEM status - which will read the "R" register
instead - to make sure CM4 doesn't begin execution earlier than it should.
Suggested-by: hglassdyb
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
The fifth HSEM (#define is equal to 4 due to zero-indexing) is used on
STM32H7 to synchronize the two cores. Update the comment above the SEMID
define to reflect this alternate usage. Also remove the associated define
CFG_HW_ENTRY_STOP_MODE_MASK_SEMID, which is unused.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Reorder the HSEM semaphore ID definitions to be sorted by ascending value.
The dummy defines are also changed to be sorted in the same order. The
definitions for STM32MP1 are already in an order that follows this order
so they don't need to be changed.
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
Adds skeleton dtsi for u5f9 for u5g9 to inherit from
Moves the peripheral nodes into dtsi's that actually has the peripheral
and includes them for SoC's higher in the series where applicable.
signed-off-by: Harris Tomy <harristomy@gmail.com>
Several drivers checked for the presense and availability of data cache
through Kconfig symbol. This is supported according to the current
documentation, but the symbol DCACHE masks two types of cache devices: arch
and external caches. The latter is present on some Cortex-M33 chips, like
the STM32U5xx. The external dcache is bypassed when accessing internal
SRAM and only used for external memories.
In commit a2dd232410 ("drivers: adc: stm32: dma support") the rationale
for gating dcache for adc_stm32 behind STM32H7X is only hinted at, but
reason seems to be that it was the only SOC the change was tested on. The
SOC configures DCACHE=y so it is most likely safe to swap the SOC gate for
DCACHE.
The DCACHE ifdefs are now hidden inside the shared stm32_buf_in_nocache()
implementation.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
This commit is retrieving the config FLASH_BASE_ADDRESS
from the XSPI node of the stm32 device dtsi <reg> property of the
"st,stm32-xspi" node. For example the CONFIG_FLASH_BASE_ADDRESS
is 0x90000000 and application is linked for that address.
Size is given by the size property of the "st,stm32-xspi-nor" node.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add config and overlay to samples for testing stop/standby modes:
- samples/boards/st/power_mgmt/blinky
- samples/boards/st/power_mgmt/wkup_pins
I've measured consumption for each low-power mode:
- stop (regulator in run mode) ~217 uA
- stop (regulator in low-power mode) ~206 uA
- standby mode ~3.5 uA
Low-power mode wakeup timings from the datasheet,
but it barely meets these in reality:
- stop (regulator in run mode) 3.6 us
- stop (regulator in low-power mode) 5.4 us
- standby 50 us
It's possible to use RTC as idle timer to exit from stop mode.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
Use the Zephyr cache API in soc initialization code instead of calling the
HAL directly. The change does not modify the pre-existing cache settings,
just changes the path they are enabled.
Signed-off-by: Henrik Lindblom <henrik.lindblom@vaisala.com>
Remove the sanity check between Cube HAL SMPS symbol and Kconfig SMPS
configuration.
SMPS is available on all STM32H7R/S SoC, so misalignment isn't possible.
Additionally, point to the hal commit which revert the fix which was done
on hal_stm32 to add this symbol.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Introduces config file entries for STM32F401XD variants. The
STM32F401XD family is related to the STM32F401XE family but with a
reduced flash memory.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
The samples/subsys/llext/shell_loader test fails when running as a
twister test on the stm32mp135f_dk/stm32mp135fxx platform, with the
following error:
soc/st/stm32/stm32mp13x/soc.c:46:36:
error: array type has incomplete element type 'struct arm_mmu_region'
46 | static const struct arm_mmu_region mmu_regions[] = {
This commit adds the missing arm_mmu.h include to fix the build issue.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
This renames the STM32_PWR_WKUP_PIN_SRC_x symbols to better match
their meaning. It also adds a new symbol (STM32_PWR_WKUP_PIN_NOT_MUXED)
for SoCs without wake-up mux support.
Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
STM32F439 SoC is an STM32F429 with an integrated crypto/hash processor
providing hardware acceleration for encryption (AES and TDES) and hash
(MD5, SHA-1 and SHA-2).
Signed-off-by: Mathieu Anquetin <mathieu.anquetin@groupe-cahors.com>
Migrate LINKLAYER_PLAT_EnableIRQ and LINKLAYER_PLAT_DisableIRQ
from linklayer_plat.c (hal/stm32 module).
Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
Migrate LINKLAYER_PLAT_EnableRadioIT and LINKLAYER_PLAT_DisableRadioIT
from linklayer_plat.c (hal/stm32 module) and adapt it using irq
Zephyr APIs.
Correct casting of irq type between using NVIC APIs or irq Zephyr APIs
Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
Increase the link layer thread priority to be more than the BLE CTRL
thread and more than the Zephyr BLE stack threads.
Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
Add a warning in the build system if both `CONFIG_PM` and
`STM32_ENABLE_DEBUG_SLEEP_STOP` are enabled at the same time. The first
is likely only enabled if the SoC is intended to be driven into low
power states to save power, while the later prevents the SoC from being
as low power as it can be.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Currently, the soc/stm32/ccm.ld is not handled in
CMAKE_LINKER_GENERATOR.
This commit adds support, making STM32 supportable by
alternative linkers such as AC6 and IAR.
This commit also renames a variable to match all other
LOADADDR symbols.
Signed-off-by: Robin Kastberg <robin.kastberg@iar.com>
This change splits eth sram region name definition
and configuration.
In the end the configuration is stored only once
er declared name.
This name shall increase readability and maintainability
Signed-off-by: Alexander Kozhinov <ak.alexander.kozhinov@gmail.com>
Generate a proper Cmake warning when signing tool isn't available.
This also allows not to fail in Github CI.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
