TI MSPM0 SoC series has General Purpose Timer and Advanced control timers
with Counting module, Capture block (measure input signal period/time) and
Compare block (to generate time expiry, output waveform like PWM).
Add a support for counter driver with alarm and counter top functions.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
This commit updates the riscv_machine_timer driver to resolve MTIME and
MTIMECMP register addresses by their `reg-names` instead of relying on
index order.
This improves clarity and robustness in DTS bindings, and is a prerequisite
for handling cases where not both MTIME and MTIMECMP registers are present
or accessible.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
This commit add a system timer driver for Renesas RX using the
CMT peripheral. The driver supports both system ticks and
high-resolution cycle counting
- Configures CMT0 as the system tick timer
- Configures CMT1 as a free-running cycle timer for precise
time tracking
- Handles timer overflows to maintain a continuous cycle count.
- Implements sys_clock_cycle_get_32() and sys_clock_cycle_get_64()
for high-resolution timing
- Supports Zephyr tickless kernel mode by tracking elapsed cycles
- Enables interrupt-based tick announcement using CMT0
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Yuichi Nakada <yuichi.nakada.sx@renesas.com>
Clean up dt binding descriptions and introduce titles where
needed to make board documentation pages look nice. The supported
hardware table on board documentation pages sources its data
from dt bindings, and needs succinct titles.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
We fixed some minor bugs and one missing component for
Microchip MEC5 HAL based chips, MEC174x and MEC175x.
These changes are in preparation for board check-in and
hello world sample. Added the clock-frequency property
to the cpu and rtimer nodes. This properity is used
derive the Kconfig's for the kernel tick.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This commit replaces a bunch of ifdefs and bindings with a single
extensible binding, and makes all standard mtime system timers consistent.
Signed-off-by: Camille BAUD <mail@massdriver.space>
NXP FlexTimer Module is a configurable timer peripheral hence it should
be located under bindings/timer.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
These devices have an architecturally fixed 13 MHz clock device. But
thankfully you can put a default into a DTS binding so we don't have
to repeat it for all of them.
Signed-off-by: Andy Ross <andyross@google.com>
This commit adds the systick driver for WCH CH32V003.
Signed-off-by: Michael Hope <michaelh@juju.nz>
Signed-off-by: Dhiru Kholia <dhiru.kholia@gmail.com>
A few bindings in the timer directory (for kernel timing sources) were
being used for counters (which can have alarms set, and have a distinct
API). Move these bindings to the counters directory.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
With this change, the LPTIM counter will be able to set
its timeout to the st,timeout value. So that system can
sleep for that period without interruption.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Timer driver using Microchip 32KHz based RTOS timer as the kernel
timer tick. The driver uses one of the 32-bit basic timers to
support the kernel's k_busy_wait API which is passed a wait
count in 1 us units. The 32-bit basic timer is selected by using
device tree chosen rtimer-busy-wait-timer set to the handle
of the desired 32-bit basic timer. If this driver is disabled,
the build system will select the ARM Cortex-M4 SysTick as the
kernel timer tick driver. The user should specify RTOS timer
as kernel tick by adding the compatible properity and setting
the status property to "okay" at the board or application level
device tree. The driver implements two internal API's for use
by the SoC PM. These two API's allow the SoC PM layer to disable
the timer used for k_busy_wait so the PLL can be disabled in
deep sleep. We used a custom API so we can disable this timer
in the deep sleep path when we know k_busy_wait will not be
called by other drivers or applications.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add timer instance in device tree
Add timer yaml file
Timer0/1/2/3 are common for MAX32xxx MCUs
MAX32655 has additional Timer4/5 which are low power timers
Co-authored-by: Mert Vatansever <mert.vatansever@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
Relocate common properties from dedicated SOC's related
Cortex-M SysTick DTS files into the new generic
'cortex-m-systick.yaml' one.
Signed-off-by: Andrey VOLKOV <andrey.volkov@munic.io>
TI Dual-Mode timer is used as the arch timer for systick on J721E R5
cores. Add DM Timer for systick timer support.
Signed-off-by: Prashanth S <slpp95prashanth@yahoo.com>
Signed-off-by: Andrew Davis <afd@ti.com>
The counter driver needs to know what is the maximum
counting frequency of each timer peripheral.
Let's add it to its DT.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add ability to set a wakeup counter in case OS Timer is
disabled in certain low power modes. Also add code to
compensate the tick value.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Utilize a code spell-checking tool to scan for and correct spelling errors
in all files within the dts/bindings/timer, usb-c, usb and watchdog.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Change the name of the node for the lptim used as lowpower
tick source to stm32_lp_tick_source.
Once enabled, this node is known as stm32_lp_tick_source
That will avoid naming the node lptim1 or lptim2 or lptim, etc.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Revert "dts: bindings: LPtimer of stm32 has a x2 factor on its clock"
The stm32u5 lptim clock source has no prescaler to divide the
the LPTIM input clock frequency : no property required.
This reverts commit 572b286010.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Use clock control API to retrieve the counter module's frequency and
update the boards using it to provide the source clocks.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This change introduces a new PWM driver for all CC13/26xx SoC.
See the documentation in ti,cc13xx-cc26xx-timer-pwm.yaml for detailed
usage instructions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This commit addst support for the system timer peripheral which
can be found in Apollo4 SoCs.
Signed-off-by: Maciej Sobkowski <msobkowski@antmicro.com>
This adds support for the TIMER1-4 counter.
Each counter has 24bits and can run on LP_CLK (15-32KHz)
or DIVN clock (32MHz) with prescaler 1-32.
Each counter can have one alarm set.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This is a new parameter to divide the LPTIM input clock
by a prescaler, changing the max reachable timeout of the LP timer.
It will divide the LPTIM input clock by 1 (reset value) up to 128.
The lptim configuration register is written with a 3bit value.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
