Add GPIO A-K nodes to the device tree for STM32MP2 SoC.
Note that GPIOs are disabled by default in the STM32MP2 SoC.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Add the mp2 exti2 dts to the dtsi file.
Add mp2 exti hal and ll function calls with EXTI2 instance. We use the
EXTI2 instance because it contains the GPIO interrupts in the non-secure
context. (We are trying to build the blinky sample as a first milestone)
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
Add the initial device tree source include (dtsi) files for the
stm32mp25 series boards, covering non-secure configuration for zephyr on
the Cortex-M33 core.
These files provide the basic hardware description, including CPU
(Cortex-M33), memory, RCC clock controller and NVIC interrupt
controller.
Key features:
- Set flash and RAM addresses to DDR memory.
- Adjust RCC peripheral address for non-secure context.
Signed-off-by: Youssef Zini <youssef.zini@savoirfairelinux.com>
The temperature calibration addresses of ts-cal1-addr and ts-cal2-addr
are not shared between stm32wba5 and stm32wba6 these addresses are now
separated to the dedicated device-tree
Signed-off-by: Romain Jayles <romain.jayles@st.com>
Adds skeleton dtsi for u5f9 for u5g9 to inherit from
Moves the peripheral nodes into dtsi's that actually has the peripheral
and includes them for SoC's higher in the series where applicable.
signed-off-by: Harris Tomy <harristomy@gmail.com>
The `idma` property added in 94847be1 was removed in the re-organisation
in 306dea6f. Re-add the property at a more generic location.
Signed-off-by: Jordan Yates <jordan@embeint.com>
The newly added mcos node contains two childreen `mco1` and `mco2` that can
be used to output different clocks on the MCO pins of the stm32g0
microcontrollers.
Signed-off-by: Andreas Schuster <andreas.schuster@schuam.de>
Adds macros to be able to use the microcontroller clock output (MCO) on the
STM32G0 microcontroller.
Signed-off-by: Andreas Schuster <andreas.schuster@schuam.de>
Add config and overlay to samples for testing stop/standby modes:
- samples/boards/st/power_mgmt/blinky
- samples/boards/st/power_mgmt/wkup_pins
I've measured consumption for each low-power mode:
- stop (regulator in run mode) ~217 uA
- stop (regulator in low-power mode) ~206 uA
- standby mode ~3.5 uA
Low-power mode wakeup timings from the datasheet,
but it barely meets these in reality:
- stop (regulator in run mode) 3.6 us
- stop (regulator in low-power mode) 5.4 us
- standby 50 us
It's possible to use RTC as idle timer to exit from stop mode.
Signed-off-by: Oleh Kravchenko <oleg@kaa.org.ua>
This patch adds support for the STM32L431XB SoC, which is the
128 KB flash / 64 KB SRAM variant of the STM32L4X1 SoC family.
Co-authored-by: Alexander Apostolu <apostolu240@gmail.com>
Signed-off-by: Alexander Apostolu <apostolu240@gmail.com>
Signed-off-by: Mirai SHINJO <oss@mshinjo.com>
Usage of dma is mandatory for the dcmi and this property is
tightly coupled with the soc itself since the configuration of
the dma depends on the source/destination, and the request line
is also fixed for an ip.
Instead of having to always have the dma property part of the
board or shield dts/overlay, add the dma property into the
dcmi node of the stm32h7.dtsi.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
`msi-range` value 4 sets MSI clock frequency to 1 MHz and not 4 MHz as
intended.
Change value to 6 to increase clock to 4 MHz which matches comment.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add disabled qdec subnodes to timers TIM1 through TIM5 and TIM8
for STM32F2 series MCUs. This enables Zephyr to provide consistent
QDEC support across all supported encoder-capable STM32 timers.
Signed-off-by: Amaan Singh <amaansingh160@gmail.com>
Added USB device node with compatible "st,stm32-usb".
Added usb_fs_phy node with compatible "usb-nop-xceiv".
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
WKUP3 is only available for g0b0/1 and g0c1 variants.
WKUP5 is only available in larger packages. However, package sizes
are currently not considered in the devicetree file schema for STM32.
Signed-off-by: Martin Jäger <martin@libre.solar>
The st,stm32-xspi compatible is defining the reg property
with the register address and size at first index
followed by the external memory base address and max allocated
xspi1 is addressing max 256 MBytes from 0x90000000
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The st,stm32-xspi compatible is defining the reg property
with the register address and size at first index
followed by the external memory base address and max allocated
size. For the stm32N6 serie,
xspi1 is addressing max 256 MBytes from 0x90000000
xspi2 is addressing max 256 MBytes from 0x70000000
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds a dtsi file for the STM32F401XD family of devices. These devices
are closely related to the STM32F401XE family of devices but with a
reduced flash memory from 512kB to 384kB.
Signed-off-by: Ricardo Rivera-Matos <ricardo.rivera-matos@cirrus.com>
In STM32N6, AXISRAM1 is next to the 400kB FLEXRAM.
By default, the FLEXRAM is configured to extend the AXISRAM1 which put
its total size to 1024kB.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Use the default kernel clock (HCLK5) for the XSPI instances instead of the
peripheral clock which may not be enabled at all.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The flash size is the second part (size) of the first reg value, not the
first part (address) of a nonexistent second reg value.
Based-on-patch-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
This commit adds the Device Tree include files
for the STM32WBA65x device
Adding GPIO D/E/G banks.
Renaming JTAG reset pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This renames the STM32_PWR_WKUP_PIN_SRC_x symbols to better match
their meaning. It also adds a new symbol (STM32_PWR_WKUP_PIN_NOT_MUXED)
for SoCs without wake-up mux support.
Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
