Adapt MAX32690 driver to use Wrap_MXC_CAN_Init to handle differences
in the MSDK API (see analogdevicesinc/msdk#1306) between the
MAX32690 and MAX32662.
can_driver_api.timing_min required phase_seg1 >= 3 and phase_seg2 >= 2
when configuring CAN bit timing. Both microcontrollers covered by this
driver (MAX32662, MAX32690) support values down to 1 for both of these
timing parameters.
Refer to the docs for registers CAN_BUSTIM1, CANn_BUSTIM1.
Add a can0 node to the MAX32662 dtsi.
Signed-off-by: Ioan Dragomir <ioan.dragomir@analog.com>
Set new default minimum sleep amount for each power state. Users can
still update these values depending on their needs.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
This commits added power management states in max32xxx MCUs
Common states added in max32xxx.dtsi file and additional ones
added in max32655.dtsi
Exit-latency-us value set as per of device datasheet spec.
The typical value is mentioned in DS is multiplied with 2.
For more information please take a look:
https://www.analog.com/en/products/max32655.html
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
low-power pins can be used while device power management enabled.
Usage
...
&uart0a_rx_p0_0 {
pinmux = <MAX32_PINMUX(0, 0, AF1)>;
low-power-enable;
/* Add low power mode flags, like: */
output-high;
bias-disable;
...
};
...
Default gpio sleep states are defined, user shall update sleep_pins
configuration as per of their needs
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
This commit adds following updates to MAX32650 SoC:
- Divide SRAM to sections according to UG.
- Add DMA and SPI nodes
- Add WDT nodes without adding clock property
- Include dma binding to SoC dts file.
Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
Signed-off-by: Burak Babaoglu <burak.babaoglu@analog.com>
Add memc driver for the MAX32 HyperBus peripheral, supporting HyperRAM
and Xccela PSRAM memory devices.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
MAX32657 is Cortex-M33 based Analog Devices MCU.
It supports ARM TrustZone security model.
There will be two boards of this MCU Secure and Non-Secure
This commit defines Secure version of peripherals.
Basic feature of MAX32657 device:
- Core is Cortex-M33
- 50MHz IPO clock
- There are 54 interrupt vectors
- 1MB flash & 256 SRAM
- MAX32657 has:
- 1 x UART
- 1 x I2C/I3C
- 1 x SPI
- 6 x TIMER
- 1 x RTC
- 1 x WDT
- 1 x TRNG
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
To prevent duplication of include lines across tests, move DMA binding
include into max32655.dtsi.
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
Add 1-Wire register file
Some MAX32 MCUs has 1-Wire peripheral some one not
So that added in device related dtsi file.
Has 1-W Not have 1-W
MAX32655 MAX32662
MAX32666 MAX32670
MAX32680 MAX32672
MAX32690 MAX32675
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
Add pwm yml file.
TIMER0/1/2/3 support pwm, LPTIMER0/1 not.
LPTIMER0/1 provide 16bits out that not meet pwm requirement.
Co-authored-by: Mert Vatansever <mert.vatansever@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
Add timer instance in device tree
Add timer yaml file
Timer0/1/2/3 are common for MAX32xxx MCUs
MAX32655 has additional Timer4/5 which are low power timers
Co-authored-by: Mert Vatansever <mert.vatansever@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
