The driver originally supported only it8xxx2 series. This updates
introduces compatibility allow it to also support it51xxx series
with minimal changes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Move register definitions from chip_chipregs.h into espi_it8xxx2.c to
make the driver more adaptable to different SoCs.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
espi: add espi peripheral channel HOST_CMD driver for rts5912
Unlike other chips using IO port 0x800-0x8ff, we utilize shared memory to
transfer host command parameters. The AP firmware must have corresponding
settings for this configuration.
Signed-off-by: jhan bo chao <jhan_bo_chao@realtek.com>
Add missing curly braces in if/while/for statements.
This is a style guideline we have that was not enforced in CI. All
issues fixed here were detected by sonarqube SCA.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds an option to verify weather the host has read the value
after the wire 3-0 bits have been updated.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
Adjusted the VW change check timings:
- Polling time changed from 100 uSec to 1 uSec.
- Timeout value changed from 10 mSec to 1 mSec.
This is to achieve the lowest possible pulse width for SCI VW in S0,
while ensuring that the VW change check is still reliable for S0iX
where SoC may take longer to process upstream events.
Also added -ETIMEDOUT error when failure.
Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
Add a Kconfig option ESPI_NPCX_RESET_SLP_SX_VW_ON_ESPI_RST.
When the option is enabled, the hardware resets the SLP_S3/SLP_S4/SLP_S5
virtual wires when the eSPI_Reset is asserted. This is required to
synchronize these virtual wires on the ungraceful global reset.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
On the new Intel SoC, the "Valid" bit of the Virtual Wire is set only for
Virtual Wires that undergo changes. This behavior differs from previous
generations. Therefore, to maintain backward compatibility, a conditional
check for the virtual wire valid bit is added for processing the virtual
wire level.
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
The CONFIG_PINCTRL is removed from the board's defconfig files.
Drivers which use pin control function should add "select PINCTRL"
in their Kconfig files.
Fixes#78619
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Port80 notifications are continously generated as long as NOT_EMPTY
bit inside of Data Attributes register is set. This register was only
read once prior entering loop and its value was not checked on each
iteration.
This patch will include reading Data Attributes register on each
iteration, this way we can exit loop when no more data is available.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
This commit updates the FLASHRXBUF parsing functionality of eSPI TAF.
It ensures that data can be read correctly from FLASHRXBUF[0].
And, the eSPI TAF request can be parsed correctly.
Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
When using the it8xxx2bx chip, because the SRAM size is 60k and
not a power of 2, using (CONFIG_SRAM_SIZE - 1) results in an
incorrect value for the h2ram base address mask.
Therefore, the mask is declared as GEMASK(19, 0) here.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add missing braces to comply with MISRA C:2012 Rule 15.6 and
also following Zephyr's style guideline.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Disable input buffer full interrupt for 60h/64h and 62h/66 ports by
calling interrupt controller API. The API has barrier mechanism to
ensure that a thread's requirement to disable peripheral interrupt
takes effect before enabling CPU interrupt. Therefore, the disabling
operation does not occur in ISR and results in interrupt 0 symptom.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The base address of H2RAM can be as large as KB(CONFIG_SRAM_SIZE), so
the mask for the H2RAM address should be (KB(CONFIG_SRAM_SIZE)-1).
This PR corrects the size of the mask.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The Host Interface Type in the DEVCNT register sets the HIF type
(either eSPI or LPC).
Currently, it is configured in the host-interface-related drivers like
eSPI or SHI. However, some I/O pads sourced from VHIF in the other
modules such as GPIO and I3C also rely on this field. It might be
problematic when using those I/Os without enabling eSPI or SHI drivers.
This commit moves the setting from the specific drivers to the global
system initialization function scfg_init().
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The register offset definition of the I/O port Data Base Address
register (0x60, 0x61) and Command/Status Base Address register
(0x62, 0x63) are reversed. This commit fixes it to avoid confusion.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Replace CONFIG_ESPI_SLAVE by CONFIG_ESPI_TARGET
Replace CONFIG_ESPI_SAF by CONFIG_ESPI_TAF
Replace ESPI_BUS_SAF_NOTIFICATION with ESPI_TAF_BUS_NOTIFICATION in API
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Namespaced the generated headers with `zephyr` to prevent
potential conflict with other headers.
Introduce a temporary Kconfig `LEGACY_GENERATED_INCLUDE_PATH`
that is enabled by default. This allows the developers to
continue the use of the old include paths for the time being
until it is deprecated and eventually removed. The Kconfig will
generate a build-time warning message, similar to the
`CONFIG_TIMER_RANDOM_GENERATOR`.
Updated the includes path of in-tree sources accordingly.
Most of the changes here are scripted, check the PR for more
info.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
1) Replace master/slave in API for new terms in eSPI spec 1.5
2) Reflect eSPI VW change and macro changes across eSPI drivers
3) Update terms in eSPI driver sample and eSPI test driver
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
