Commit Graph

19 Commits

Author SHA1 Message Date
Keith Packard
513e6ed5d2 arch/common: Mark interrupt tables const when !DYNAMIC_INTERRUPTS
When not using dynamic interrupt mapping, various interrupt tables are
configured to be stored in read-only memory in the linker script.. Mark
them const so that the linker doesn't complain.

This affects _sw_isr_table, _irq_vector_table, and z_shared_sw_isr_table in
arch/common along with _VectorTable in arch/arc.

Signed-off-by: Keith Packard <keithp@keithp.com>
2025-06-10 22:13:09 +02:00
Joel Holdsworth
d76cf5b57e arch: mips: Rename _Fault to z_mips_fault
The exception fault handler function is named _Fault which is inconsistent
with all other arch-specific functions present in Zephyr. This patch
replaces the name with z_mips_fault.

Signed-off-by: Joel Holdsworth <jholdsworth@nvidia.com>
2025-01-28 23:42:06 +01:00
Anas Nashif
8a824f307d mips: tracing: add switched_out trace point
add missing switched_out trace point.

Partially fixes #76057

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-11-06 14:43:27 -06:00
Anas Nashif
7e225efab7 arch: initialize irq_offload during boot, do not use SYS_INIT
Do not use SYS_INIT for initializing irq_offload when enabled, instead
using a new interface that is called during the boot process for all
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-17 20:05:22 -04:00
Anas Nashif
6ec74d02b6 cache: add new interface arch_cache_init() for initializing cache
Add a new call for initializing cache on architectures that need that.
Avoid using SYS_INIT for this and instead call the hook in a fixed place
and run if implemented.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-17 20:05:22 -04:00
Anas Nashif
e260d03686 init: introduce soc and board hooks
Introduce soc and board hooks to replace arch specific code
and replace usages of SYS_INIT for platform initialization.

include/zephyr/platform/hooks.h introduces the hooks to be implemented
by boards and SoCs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-09-09 10:07:33 +02:00
Anas Nashif
a91c6e56c8 arch: use same syntax for custom arch calls
Use same Kconfig syntax for those  custom arch call.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-12 12:43:36 +02:00
Anas Nashif
7f52fc4188 arch: custom cpu_idle and cpu_atomic harmonization
custom arch_cpu_idle and arch_cpu_atomic_idle implementation was done
differently on different architectures. riscv implemented those as weak
symbols, xtensa used a kconfig and all other architectures did not
really care, but this was a global kconfig that should apply to all
architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2024-08-12 12:43:36 +02:00
Yong Cong Sin
6a3cb93d88 arch: remove the use of z_arch_esf_t completely from internal
Created `GEN_OFFSET_STRUCT` & `GEN_NAMED_OFFSET_STRUCT` that
works for `struct`, and remove the use of `z_arch_esf_t`
completely.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Yong Cong Sin
e54b27b967 arch: define struct arch_esf and deprecate z_arch_esf_t
Make `struct arch_esf` compulsory for all architectures by
declaring it in the `arch_interface.h` header.

After this commit, the named struct `z_arch_esf_t` is only used
internally to generate offsets, and is slated to be removed
from the `arch_interface.h` header in the future.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Yong Cong Sin
3998e18ec4 arch: rename all esf struct to struct arch_esf
Rename every architecture's esf struct to `struct esf`.

Signed-off-by: Yong Cong Sin <ycsin@meta.com>
2024-06-04 14:02:51 -05:00
Anas Nashif
dddc5687a9 arch: mips: use LOG_ERR to print exceptions
Change exception code to use LOG_ERR and align with all other
architectures when CONFIG_EXCEPTION_DEBUG is enabled.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-14 09:32:27 +01:00
Anas Nashif
e25f31ab78 arch: guard more code with CONFIG_EXCEPTION_DEBUG
It should be possible to disable exception debug, which is enabled by
default to reduce image size. Add missing guards now that the option is
cross architecture.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-14 09:32:27 +01:00
Anas Nashif
9f3ed1b2b3 arch: _PrepC -> z_prep_c
Rename to use common naming for z_prep_c applied to all architectures.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-12-11 18:23:52 -05:00
Gerard Marull-Paretas
be38456279 include: types: remove ulong_t
ulong_t was mainly used in MIPS/RISC-V. Just use "unsigned long".

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-06 18:16:33 +02:00
Anas Nashif
a408b56e12 arch: mips: add mising braces to single line if statements
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 11:00:45 -04:00
Gerard Marull-Paretas
4b91c2d79f asm: update files with <zephyr/...> include prefix
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-09 12:45:29 -04:00
Gerard Marull-Paretas
16811660ee arch: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all arch code to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to zephyrproject-rtos#45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:57:22 +02:00
Antony Pavlov
0369998e61 arch: add MIPS architecture support
MIPS (Microprocessor without Interlocked Pipelined Stages) is a
instruction set architecture (ISA) developed by MIPS Computer
Systems, now MIPS Technologies.

This commit provides MIPS architecture support to Zephyr. It is
compatible with the MIPS32 Release 1 specification.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2022-01-19 13:48:21 -05:00