Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
These were causing some issues in the old kernel, but the unified
kernel no longer uses these.
Issue: ZEP-513
Change-Id: I87216565231cd244886fbffe4b4d420d1687b245
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
In case the channel provides its own MTU and allocator it should be
able to store as much data as set in the MTU, based on that the code
can give enough credits to fill the entire channel MTU.
Change-Id: I291cf1bb643f200bde191914e814f681f4f65c3e
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This helps catch any format string issues when using this API.
Change-Id: I9475eed4fa12e72182cc16b0fa4a358fa6faca8e
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The new IS_ENABLED macro allows exposing conditionally enabled code
always to the compiler, even though it may not ultimately end up being
built. This is in particular useful for letting the compiler catch any
logging format string errors. Introduce a new BT_DBG_ENABLED macro
that c-files need to define before including <bluetooth/log.h> in
order to choose whether BT_DBG() logs are enabled or not.
When no Bluetooth logs are enabled the patch also modifies the log
macros to have the format strings checked with the help of the
__printf_like annotation and empty static inline functions.
Change-Id: Ie6bc8e10727b5b306f3ed0f94089a07a22583d9b
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The idle priority was not accounted for.
With this change, the philosophers demo runs in coop-only mode.
Change-Id: I23db33687bcf3b2107d5fc07977143730f62e476
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
In such a case, the system must take the idle coop priority into
account.
Change-Id: Ica5a4a7a659cb165073e9b8042a77ed23a6a662a
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
Introduce a new callback to bt_conn_cb that allows the application to
decide whether the accept or reject an incoming connection parameter
request. If the request is accepted the callback allows the
application to also adjust the values to what it thinks are more
appropriate.
The Zephyr Bluetooth API allows multiple registered connection
callbacks, so in principle there may be multiple le_param_req()
callbacks. It's recommended for an app to just use one (for clarity),
but if there are multiple the app is responsible for managing
potentially different requirements. In the case of multiple callbacks
each callback will receive the modified parameters in case a previous
callback modified them.
Jira: ZEP-1474
Change-Id: I098db5791aac521f1edfa9fefdf847db0a27e3a5
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
BT_BUF_RX_SIZE is used for the RX buffer pool which is used for both
ACL data and HCI events. It should therefore not contain any
ACL-specific details. This patch removes the ACL header size from the
macro and instead makes taking it into account the responsibility to
the Kconfig option. Since buffer sizes are anyway rounded up to the
nearest multiple of 4 the default goes up from 70 to 76.
Change-Id: I41274d9131e7529d41c16bd66de95637fb150a29
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Add proper documentations for all of the callbacks that are part of
the bt_conn_cb struct.
Change-Id: Iabce1d08a84c3849307c436a2cc528edffc62242
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The Core Specification Supplement v7 defines one new ATT error code.
Change-Id: I4fe5341a6bbc57fd73e5a12fcc4dc72b643eab35
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Properly document the various APIs exposed by hci_driver.h.
Change-Id: Ic8daba4956e4c5d2cc6597556b55ab5221495ad7
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
There are no users of this API and no (currently) envisioned use cases
for it. Remove it for now - it can always be brought back later if
there's a need for it.
Change-Id: I6530e096e3671c844a3f7dea8856147ffc716d71
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This was missing and all kernel objects belong to this group.
Change-Id: I3c31b168ca984b7d44cc5614a2e2bd5cc492cf50
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Remove the type field from the sensor value structure. All values will
have the type previously defined by SENSOR_VALUE_TYPE_INT_PLUS_MICRO.
This simplifies the interface, as apps will know what value type to
expect. Apps that prefer to use double values can optain them using the
sensor_value_to_double function.
Change-Id: I3588d74258030eb16c3f89d8eead13cca4606b18
Signed-off-by: Bogdan Davidoaia <bogdan.davidoaia@linaro.org>
Similar to what was available with nano timers in the original kernel,
allow a user to associate opaque data with a timer.
Fix for ZEP-1558.
Change-Id: Ib8cf998b47988da27eba4ee5cd2658f90366b1e4
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
pulpino soc has custom-extended riscv ISA that is accounted
for if CONFIG_RISCV_GENERIC_TOOLCHAIN is not set.
(ex: bit manipulation asm opcodes)
Change-Id: I4dafc4ebc2fedcc4eb6a3dedd0412816afea6004
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
RISC-V is an open-source instruction set architecture.
Added support for the 32bit version of RISC-V to Zephyr.
1) exceptions/interrupts/faults are handled at the architecture
level via the __irq_wrapper handler. Context saving/restoring
of registers can be handled at both architecture and SOC levels.
If SOC-specific registers need to be saved, SOC level needs to
provide __soc_save_context and __soc_restore_context functions
that shall be accounted by the architecture level, when
corresponding config variable RISCV_SOC_CONTEXT_SAVE is set.
2) As RISC-V architecture does not provide a clear ISA specification
about interrupt handling, each RISC-V SOC handles it in its own
way. Hence, at the architecture level, the __irq_wrapper handler
expects the following functions to be provided by the SOC level:
__soc_is_irq: to check if the exception is the result of an
interrupt or not.
__soc_handle_irq: handle pending IRQ at SOC level (ex: clear
pending IRQ in SOC-specific IRQ register)
3) Thread/task scheduling, as well as IRQ offloading are handled via
the RISC-V system call ("ecall"), which is also handled via the
__irq_wrapper handler. The _Swap asm function just calls "ecall"
to generate an exception.
4) As there is no conventional way of handling CPU power save in
RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle
functions just unlock interrupts and return to the caller, without
issuing any CPU power saving instruction. Nonetheless, to allow
SOC-level to implement proper CPU power save, nano_cpu_idle and
nano_cpu_atomic_idle functions are defined as __weak
at the architecture level.
Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
This adds NET_REQUEST_BT_DISCONNECT which can be used to disconnect
IPSP in case it is connected.
Change-Id: I8da00b02ee08611bef5f4c0708936b2d31fd2a93
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This adds NET_REQUEST_BT_SCAN which can be used to scan peripherals
advertising IPSS UUID.
Change-Id: I2463079d182b4da080e6ef94d883c7c1e24a454c
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
Connect command can be used to initiate a connection, which in IPSP
terminology refer to a router role.
Change-Id: I12b9428924c88a9c68d3adbfe9016a0dd690aade
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
They should return the same value as in NET_MGMT_LAYER and
NET_MGMT_LAYER_CODE.
Change-Id: Ia95adcd3b6b6aaf0ed29f3260bc54784ca532d8f
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
When CONFIG_NET_MGMT_EVENT is not set, it will still be able to compile
code using net_mgmt_event related functions.
Change-Id: I6824c57093636867ea4228338aa6c02913975510
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
TCP didn't actually have a way to signal synchronous receipt of a FIN
packet. Extend the recv_cb API to allow a NULL buf argument with
status==0 (by analogy to Unix's zero-length read) to signal EOF.
Update docs too, and also echo_server which wasn't prepared to handle
this situation.
Change-Id: I7dc08f9e262a81dcad9c670c6471898889f0b05d
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The state of a net context is checked as a whole value (not individual
bits). Currently, the net_context_set_state function is adding the
passed in flags to the existing value. This is incorrect.
Change-Id: Ieba6b9dfc35537745b14c50a2ccb115c6976c001
Signed-off-by: Michael Scott <michael.scott@linaro.org>
The cortex-m7 is an implementation of armv7-m. Adjust the Kconfig
support for cortex-m7 to reflect this and drop the unnecessary,
explicit, conditional compilation.
Change-Id: I6ec20e69c8c83c5a80b1f714506f7f9e295b15d5
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Precursor patches have arranged that conditional compilation hanging
on CONFIG_CPU_CORTEX_M3_M4 provides support for ARMv7-M, rename the
config variable to reflect this.
Change-Id: Ifa56e3c1c04505d061b2af3aec9d8b9e55b5853d
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
Precursor patches have arranged all conditional compilation hanging on
CONFIG_CPU_CORTEX_M0_M0PLUS such that it actually represents support
for ARM ARMv6-M, rename the config variable to reflect this.
Change-Id: I553fcf3e606b350a9e823df31bac96636be1504f
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The ARM code base provides for three mutually exclusive ARM
architecture related conditional compilation choices. M0_M0PLUS,
M3_M4 and M7. Throughout the code base we have conditional
compilation gated around these three choices. Adjust the form of this
conditional compilation to adopt a uniform structure. The uniform
structure always selects code based on the definition of an
appropriate config option rather the the absence of a definition.
Removing the extensive use of #else ensures that when support for
other ARM architecture versions is added we get hard compilation
failures rather than attempting to compile inappropriate code for the
added architecture with unexpected runtime consequences.
Adopting this uniform structure makes it straight forward to replace
the adhoc CPU_CORTEX_M3_M4 and CPU_CORTEX_M0_M0PLUS configuration
variables with ones that directly represent the actual underlying ARM
architectures we provide support for. This change also paves the way
for folding adhoc conditional compilation related to CPU_CORTEX_M7
directly in support for ARMv7-M.
This change is mechanical in nature involving two transforms:
1)
#if !defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
...
is transformed to:
#if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7)
...
2)
#if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
...
#else
...
#endif
is transformed to:
#if defined(CONFIG_CPU_CORTEX_M0_M0PLUS)
...
#elif defined(CONFIG_CPU_CORTEX_M3_M4) || defined(CONFIG_CPU_CORTEX_M7)
...
#else
#error Unknown ARM architecture
#endif
Change-Id: I7229029b174da3a8b3c6fb2eec63d776f1d11e24
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The cortex-m related memory map definitions in memory-map.h are all
CPU specific. In preparation for replacing
CONFIG_CPU_CORTEX_M0_M0PLUS with CONFIG_ARMV6_M and
CONFIG_CPU_CORTEX_M4_M4 with CONFIG_ARMV7_M, adjust memory_map.h
conditional compilation to hang on CONFIG_* variables for specific
cortex CPUs.
Change-Id: I2af0b75eaa5b16f88836dbdae41446beacaeba71
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
This trick was pioneered in Linux as the config_enabled() macro. The
madness has the effect of taking a macro value that may be defined to
"1" (e.g. CONFIG_MYFEATURE), or may not be defined at all and turning
it into a literal expression that can be used at "runtime". That is,
it works similarly to "defined(CONFIG_MYFEATURE)" does except that it
is an expansion that can exist in a standard expression and be seen by
the compiler and optimizer. Thus much #ifdef usage can be replaced
with cleaner expressions like:
if (IS_ENABLED(CONFIG_MYFEATURE))
myfeature_enable();
Change-Id: I40657d2aa3f802429ac33675a1fe245a5da86615
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The ICCM memory, when present, can be both written and read,
so changing the attributes to be read-write-execute.
Change-Id: I432bd36f4a6ef632b7c4ce3bf8aa138895d52642
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
The main, idle, interrupt and workqueue call stack definitions are not available
to applications to call stack_analyze() on, but they often require to be
measured empirically to tune their sizes in particular applications and
use cases.
This exposes a new k_call_stacks_analyze() API call that allows the
application to measure the used call stack space for the 4
kernel-defined call stacks.
Additionally for the ARC architecture the FIRQ stack is also profiled.
Change-id: I0cde149c7366cb6c4bbe8f9b0ab1cc5b56a36ed9
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Various sensor samples are hardwired to expect returned sensor values
are represented as doubles. In each case this assumption is incorrect.
Introduce a generic sensor_value to double helper function and adjust
the samples to use it.
Change-Id: I89c788686576562b84e07a36064640231340c33b
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
It is then possible to set the channel, pan_id and short address through
this API. Such features are mainly useful for testing purposes.
Change-Id: I41aeb397afdb231458a3b13638f3e13d3ac28a6c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
