- Remove PLCA paramaters from lan865x SPI device description.
- Add MDIO and internal PHY device description along with PLCA
parameters in the PHY node.
Signed-off-by: Parthiban Veerasooran <parthiban.veerasooran@microchip.com>
This commit replaces a hack where is_busy status of adltc2990 was
checked by fetching SENSOR_CHAN_ALL with a dedicated function
expose adltc2990_trigger_measurement function to public api
Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
Add wsen_pdus_25131308XXXXX driver with
the corrected name and compatibility with
the hal update as well as added new features..
Signed-off-by: Wajdi ELMuhtadi <wajdi.elmuhtadi@we-online.com>
Add check for status okay for dut2. Compilation was failing if dut2
existed but was disabled.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This commit introduces a new Sensor Clock API, enabling the retrieval
of cycle counts and conversion to nanoseconds based on the system or
external clock. The API includes:
- `sensor_clock_get_cycles()` to get the current cycle count from the
sensor clock.
- `sensor_clock_cycles_to_ns()` to convert cycles to nanoseconds using
the clock's frequency.
The implementation supports both system clocks and external clocks
defined in the device tree, making the sensor clock integration more
flexible for various sensor use cases.
Signed-off-by: Mark Chen <mark.chen@cienet.com>
Change the stepper API to instead of changing the stepper speed based on
the velocity in microsteps per second to use the delay in usec between
successive steps. Also remove the velocity from the `stepper_run` function
as typical API usage is enable -> set step interval -> run.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.
Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.
All peripherals drivers were reworked with the newer solution.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Rename the following properties in binding and overlay:
-- primary_source => primary-source
-- secondary_source => secondary-source
-- filter_count => filter-count
-- filter_period => filter-period
Signed-off-by: James Roy <rruuaanng@outlook.com>
Some time ago a new shim for nRF UARTE was added (uart_nrfx_uarte2.c)
which used nrfx_uarte.c driver underneath. It was supposed to support
nrf54x platforms. However, later on legacy driver (uart_nrfx_uarte.c)
was extended to support nrf54x platforms and it takes less code size,
has better performance and more features. Shim uart_nrfx_uarte2 will
no longer be supported. As new shim is the default and there is a
Kconfig to pick the legacy shim (CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=y)
it cannot be deprecated in the normal way. Additional Kconfig option
is created (DEPRECATED_UART_NRFX_UARTE_LEGACY_SHIM) which is enabled
if CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n and it selects DEPRECATED.
A warning was also added to the CMakeLists.txt.
Patch removes use CONFIG_UART_NRFX_UARTE_LEGACY_SHIM in tests.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Add new target to the following tests:
- uart_elementary
- uart_async_api
- uart_mix_fifo_poll
- uart_pm
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Due to cm7 on RT1180 is secondary core, and dtcm have been used
as sram directly, so there is no need to define zephyr,dtcm node.
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Add pinctrl and dma channel/mux information for lpspi3 on cm33/cm7 cores.
Set dma4 status is OK.
Add pinctrl for lpuart3
tests: driver: spi: support spi_loopback case on MIMXRT1180_EVK
Add .config/.overlay files for cm33/cm7 cores
Link to ocram1 as RAM region on cm7 core
Link to dtcm as RAM region on cm33 core
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Use a string for the xfr-min-bits property over an integer value, as this
significantly improves the readability of the MIPI DBI SPI device binding.
Signed-off-by: Stephan Linz <linz@li-pro.net>
Enable device runtime PM for nrf54h20dk/nrf54h20/cpuapp where
fast UARTE (uart120) is tested.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Fixes issue introduced in #76460
The previous code attempted to detect whether TMAG5273 or TMAG3001 was
connected based on DEVICE ID register. This doesn't work as the bits that
denote the version on one part are undefined on the other part, and cannot
be relied on to be zero.
This commit adds a TMAG3001 compatible which (for now) is just derived from
the TMAG5273 compatible. This allows TMAG3001 to be specified directly in
the DT. The driver code is updated to support both compatibles.
Signed-off-by: Yiding Jia <yiding.jia@gmail.com>
Add configuration for UARTE120 fast instance. Use multi-instance capability
of the test to run same test on UARTE120 and slow UARTE peripheral.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Do not use CONFIG_UART_NRFX_UARTE_LEGACY_SHIM=n because this option
is going to be deprecated and this option does not support all uart
instances (e.g. uart120). Limit testing of configuration with
CONFIG_UART_0_ENHANCED_POLL_OUT=y to legacy platforms. nrf54x
platforms have ENDTX-STOPTX short so this feature is not supported
and needed there.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
gpio_loopback fixture is used for single pair of shortened pins. For
this test 2 pairs are needed (cts-rts + tx-rx) so gpio_loopback does
not describe it correctly.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
With the changes made in PR #76061, only on the F429ZI platform, in
the test_write_abort test,the number of received data (2) is not equal
to the number of sent data (1). It looks like uart_tx_abort is done very
quickly, and the callback doesn't have enough time to deal with it.
Adding a small delay solves the problem and doesn't affect results on
other platforms.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Test cases on F746ZG work with USERSPACE config not enabled.
PR #80944 forces the use of the TEST_ENABLE_USERSPACE config with
the "select" statement instead of "imply," which is more restrictive
for test case dependencies.This leads to the error
"Memory region 0x2004d180 (size 8) write access denied" on boards.
By setting CONFIG_TEST_USERSPACE=n, the TEST_ENABLE_USERSPACE config will
not be enabled.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
Add the overlay file to run tests/drivers/watchdog/wdt_basic_api
on the nucleo_h7s3l8 and stm32h7s78_dk target boards
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This introduces the pro micro nrf52840 board type,
commonly available as the cheapest nrf52840 development board,
and is based on the Nice!Nano
Signed-off-by: Camille BAUD <mail@massdriver.space>
The it8801 template is helpful but in the current state it does not
allow changing the device address as that is in the template itself. Fix
that by moving the template content down a level in the hierarchy, so
that it extends the mfd device itself rather than than instantiate it,
then the base instance can have any address, now the only limitation is
that only one instance is possible, but that is probably alright for
now.
Alternatives would be to use a define for the address, or even a
template per address, but this feels like a better compromise for now.
This may also use
https://github.com/zephyrproject-rtos/zephyr/pull/82825 in the future if
that ever becomes a thing.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Adds the counter property to the tmc2209 node to ensure counter dependant
step-dir code is build by CI.
Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
The LIS2DUXS12 is a smart, digital, 3-axis linear accelerometer whose
MEMS and ASIC have been expressly designed to combine the lowest current
consumption possible with features such as always-on antialiasing
filtering, a finite state machine (FSM) and machine learning core (MLC)
with adaptive self-configuration (ASC), and an analog hub / Qvar sensing
channel.
(https://www.st.com/en/mems-and-sensors/lis2duxs12.html)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
